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KR890006080A - VCMR (ViDEO CAMERA MEMORY RECORDER) SYSTEM - Google Patents

VCMR (ViDEO CAMERA MEMORY RECORDER) SYSTEM Download PDF

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Publication number
KR890006080A
KR890006080A KR870010581A KR870010581A KR890006080A KR 890006080 A KR890006080 A KR 890006080A KR 870010581 A KR870010581 A KR 870010581A KR 870010581 A KR870010581 A KR 870010581A KR 890006080 A KR890006080 A KR 890006080A
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KR
South Korea
Prior art keywords
circuit
signal
switch
controller
color difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR870010581A
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Korean (ko)
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KR900003486B1 (en
Inventor
윤종경
Original Assignee
안시환
삼성전자 주식회사
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Publication date
Application filed by 안시환, 삼성전자 주식회사 filed Critical 안시환
Priority to KR1019870010581A priority Critical patent/KR900003486B1/en
Publication of KR890006080A publication Critical patent/KR890006080A/en
Application granted granted Critical
Publication of KR900003486B1 publication Critical patent/KR900003486B1/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/907Television signal recording using static stores, e.g. storage tubes or semiconductor memories

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)
  • Color Television Systems (AREA)

Abstract

내용 없음No content

Description

VCMR(VIDEO CAMERA MEMORY RECORDER)시스템VCMR (VIDEO CAMERA MEMORY RECORDER) SYSTEM

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 본 발명의 블럭도.1 is a block diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 활상소자 2(8-10) : 버퍼1: Live element 2 (8-10): Buffer

3 : 샘플링과 홀더회로 4 : 휘도신호 처리회로3: sampling and holder circuit 4: luminance signal processing circuit

5 : 색신호처리회로 6 : YL(황)색신호처리회로5: color signal processing circuit 6: Y L (yellow) color signal processing circuit

7 : 색차신호회로,(11-13) 27 : 스위치7: color difference signal circuit, (11-13) 27: switch

14 : 믹싱회로 15 : 변조회로14 mixing circuit 15 modulation circuit

(16-18) : A/D컨버터 (19-21) : 데이타 압축회로(16-18): A / D converter (19-21): Data compression circuit

22 : 드라이버 23 : 동기신호 발생회로22: driver 23: synchronization signal generating circuit

24 : 앤드게이트 25 : 컨트롤러24: AND gate 25: controller

26 : 1/4카운터 40 : 1/2카운터26: 1/4 counter 40: 1/2 counter

(28-30) : 메모리소자 (31-33) : 재생회로(28-30): Memory element (31-33): Regeneration circuit

(34-36) : D/A컨버터(34-36): D / A Converter

Claims (2)

촬상소자(1)는 버퍼(2)를 통하여 샘플링과 홀더회로(3)에 접속되고 상기 샘플링과 홀더회로(3)는 신호처리회로(4-6)와 색차신호회로(7)를 통하여 버퍼(8-10)와 스위치(11-13) 변조회로(15)를 거쳐 믹싱회로(14)에 접속되는 회로에 있어서, 상기 색차신호회로(7)와 휘도신호 처리회로(4)에 연결되어 아날로그 색차신호를 디지탈신호로 변환시켜 주는 A/D 컨버터(16-18)와 데이타 압축회로(19-21)와 메모리소자(28-30)로 구성하여 스위치(27)의 출력신호에 따라 컨트롤러(25)는 디지탈신호인 화상신호를 메모리에 기록할 때 필드로 기록한 것인가 프레임으로 기록할 것인가를 결정해 주는 회로로 구성된 것을 특징으로 하는 VCMR 시스템.The image pickup device 1 is connected to the sampling and holder circuit 3 through the buffer 2, and the sampling and holder circuit 3 is connected to the buffer (through the signal processing circuit 4-6 and the color difference signal circuit 7). 8-10) and a circuit connected to the mixing circuit 14 via the switch 11-13 modulation circuit 15, the analog color difference being connected to the color difference signal circuit 7 and the luminance signal processing circuit 4; A / D converter (16-18), data compression circuit (19-21) and memory element (28-30) which converts the signal into a digital signal, the controller 25 according to the output signal of the switch 27 Is a circuit for determining whether to record a digital signal as a field or frame as a digital signal. 제 1 항에 있어서, 상기 컨트롤러(25)에 연결된 동기신호 발생회로(23)의 동기신호에 따라 1/2카운터(40)와 1/4카운터(26)가 동작하는 회로와 상기 1/4카운터(26)는 수직동기신호(V-SYNC)를 입력받아 그 출력신호(X1)(X2)를 만들어 스위치(24)에 인가시키는 회로와, 상기 스위치(24)의 선택에 따라 컨트롤러(25)는 메모리내에 프레임의 1차필드와 2차필드에 화상을 녹화시키거나, 한 프레임을 동일 필드로 녹화시킨 후 재생시는 재생회로(31-33)와 D/A 컨버터(34-36)와 스위치(11-13)와 변조회로(15)를 거쳐 믹싱회로(14)에 연결 구성되어 그 출력신호는 NTSC 컴퍼지트 비디오 신호가 되도록 한 것을 특징으로 하는 VCMR시스템.The circuit according to claim 1, wherein the half counter 40 and the quarter counter 26 operate according to the synchronization signal of the synchronization signal generating circuit 23 connected to the controller 25. A circuit 26 receives a vertical synchronizing signal V-SYNC and generates an output signal X 1 (X 2 ) and applies it to the switch 24, and the controller 25 according to the selection of the switch 24. ) Records images in the primary and secondary fields of a frame in the memory, or records one frame in the same field and plays back the playback circuits 31-33, D / A converters 34-36 and switches during playback. And (11-13) and a modulation circuit (15) to be connected to the mixing circuit (14) so that its output signal is an NTSC composite video signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870010581A 1987-09-24 1987-09-24 Vcmr system Expired KR900003486B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870010581A KR900003486B1 (en) 1987-09-24 1987-09-24 Vcmr system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870010581A KR900003486B1 (en) 1987-09-24 1987-09-24 Vcmr system

Publications (2)

Publication Number Publication Date
KR890006080A true KR890006080A (en) 1989-05-18
KR900003486B1 KR900003486B1 (en) 1990-05-19

Family

ID=19264689

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870010581A Expired KR900003486B1 (en) 1987-09-24 1987-09-24 Vcmr system

Country Status (1)

Country Link
KR (1) KR900003486B1 (en)

Also Published As

Publication number Publication date
KR900003486B1 (en) 1990-05-19

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