KR970022682A - Computer and TV, video signal interface device - Google Patents
Computer and TV, video signal interface device Download PDFInfo
- Publication number
- KR970022682A KR970022682A KR1019950038532A KR19950038532A KR970022682A KR 970022682 A KR970022682 A KR 970022682A KR 1019950038532 A KR1019950038532 A KR 1019950038532A KR 19950038532 A KR19950038532 A KR 19950038532A KR 970022682 A KR970022682 A KR 970022682A
- Authority
- KR
- South Korea
- Prior art keywords
- signal
- synchronization
- outputting
- clock signal
- signals
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N11/00—Colour television systems
- H04N11/06—Transmission systems characterised by the manner in which the individual colour picture signal components are combined
- H04N11/12—Transmission systems characterised by the manner in which the individual colour picture signal components are combined using simultaneous signals only
- H04N11/14—Transmission systems characterised by the manner in which the individual colour picture signal components are combined using simultaneous signals only in which one signal, modulated in phase and amplitude, conveys colour information and a second signal conveys brightness information, e.g. NTSC-system
- H04N11/143—Encoding means therefor
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/02—Graphics controller able to handle multiple formats, e.g. input or output formats
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Color Television Systems (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
본 발명은 컴퓨터에서의 영상 신호를 텔레비젼으로 볼 수 있도록 변환하도록 한 컴퓨터와 텔레비젼의 영상신호 인터페이스 장치에 관한 것으로, 컴퓨터(100)로부터의 R, G, B 색 신호를 직류레벨의 변동 없이 일정하게 유지시켜서 출력하는 제1버퍼부(210)와 ; 상기 컴퓨터(100)로부터의 제1수평, 수직 동기 신호를 임시 저장하여 출력하는 제2버퍼부(220)와 ; 상기 제2버퍼부(220)로부터의 제1수평, 수직 동기 신호에 기초하여 제1클럭 신호, 제2클럭 신호와, 읽기/쓰기 제어 신호, 제2수평, 수직 동기 신호를 선택적으로 출력하는 동기 제어부(230)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 의거하여 제1버퍼부(210)로부터의 R, G, B 색 신호를 샘플링하고 소정 비트의 디지탈 색 신호로 변환하여 출력하는 A/D변환부(240)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 동기되어 읽기/쓰기 제어 신호에 의거하여 상기 A/D변환부(240)로부터의 디지탈 색 신호를 하나의 라인량만큼 저장하고, 상기 동기 제어부(230)로부터의 제2클럭 신호에 동기되어 읽기/쓰기 제어 신호에 의거하여 저장된 하나의 라인양만큼의 디지탈 색 신호를 출력하는 라인 메모리부(250)와 ; 상기 라인메모리부(250)로부터의 디지탈 색 신호를 상기 제2클럭 신호에 의거하여 아날로그 R, G, B 색 신호로 변환하여 출력하는 D/A변환부(260)와 ; 상기 동기 제어부(230)로부터의 제2수평, 수직 동기 신호를 합성하여 복합 동기 제어부(230)로부터의 제2수평, 수직 동기 신호를 합성하여 복합 동기 신호를 출력하는 가산부(270)와 ; 상기 D/A변한부(260)로부터의 아날로그 R, G, B 색 신호와 상기 가산부(270)로부터의 복합 동기 신호에 의거하여 텔레비젼 복합 영상 신호를 출력하는 엔코더부(280)를 포함하여, 컴퓨터의 게임 및 입체 영상을 대형 텔레비젼등의 디스플레이 장치로 볼 수 있도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal interface device of a computer and a television which converts a video signal from a computer so that it can be viewed on a television. A first buffer portion 210 which is held and output; A second buffer unit 220 for temporarily storing and outputting a first horizontal and vertical synchronization signal from the computer 100; A synchronization for selectively outputting a first clock signal, a second clock signal, a read / write control signal, a second horizontal, and a vertical synchronization signal based on the first horizontal and vertical synchronization signals from the second buffer unit 220 A controller 230; An A / D converter configured to sample R, G, and B color signals from the first buffer unit 210 based on the first clock signal from the synchronization controller 230, and convert the R, G, and B color signals into a predetermined bit of digital color signals 240 and; The digital color signal from the A / D converter 240 is stored by one line based on a read / write control signal in synchronization with the first clock signal from the synchronization controller 230, and the synchronization controller ( A line memory section 250 for synchronizing with the second clock signal from 230 and outputting a digital color signal equal to the amount of one line stored based on the read / write control signal; A D / A converter 260 for converting the digital color signal from the line memory unit 250 into analog R, G, and B color signals based on the second clock signal and outputting the analog color signal; An adder 270 for synthesizing the second horizontal and vertical synchronizing signals from the synchronizing control unit 230 and synthesizing the second horizontal and vertical synchronizing signals from the complex synchronizing control unit 230 and outputting a composite synchronizing signal; And an encoder unit 280 for outputting a television composite video signal based on the analog R, G, and B color signals from the D / A changing unit 260 and the composite synchronization signal from the adder 270, Computer games and stereoscopic images can be viewed on display devices such as large TVs.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명에 따른 인터페이스 장치에 대한 블럭도.1 is a block diagram of an interface device according to the present invention.
제2도는 본 발명을 설명하기 위한 파형도.2 is a waveform diagram for explaining the present invention.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950038532A KR100196845B1 (en) | 1995-10-31 | 1995-10-31 | Video signal interface device of computer and TV |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950038532A KR100196845B1 (en) | 1995-10-31 | 1995-10-31 | Video signal interface device of computer and TV |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR970022682A true KR970022682A (en) | 1997-05-30 |
| KR100196845B1 KR100196845B1 (en) | 1999-06-15 |
Family
ID=19432173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950038532A KR100196845B1 (en) | 1995-10-31 | 1995-10-31 | Video signal interface device of computer and TV |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR100196845B1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100763190B1 (en) * | 2005-12-19 | 2007-10-04 | 삼성전자주식회사 | Imaging System, Image Signal Format Setting Device and Setting Method |
-
1995
- 1995-10-31 KR KR1019950038532A patent/KR100196845B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR100196845B1 (en) | 1999-06-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR960011945A (en) | Digital processing equipment | |
| KR960035616A (en) | Compact Disc Player Integrated TV Receiver | |
| KR970022682A (en) | Computer and TV, video signal interface device | |
| KR970022714A (en) | Computer and TV, video signal interface device | |
| KR970022722A (en) | Video signal interface device of computer and display device | |
| KR970022723A (en) | Video signal interface device of computer and display device | |
| KR900010741A (en) | Video signal recorder | |
| KR960043855A (en) | TV encoder | |
| KR960006583A (en) | Screen size conversion circuit of image signal processor | |
| KR100272695B1 (en) | Apparatus for scan converting and synthesize computer video signals using dual port memory | |
| KR950007564A (en) | Color Video Processing Unit | |
| KR970005648Y1 (en) | Apparatus for displaying image data of computer in tv | |
| KR950004132B1 (en) | Digital rgb encoder | |
| KR100262964B1 (en) | MPEG image scaling device | |
| KR930007213A (en) | Image synthesis method and device | |
| KR910009064A (en) | Mosaic effect generator | |
| KR970003177A (en) | Video processing unit | |
| KR0138210B1 (en) | Digital video encoder circuit | |
| KR970057714A (en) | TV splitter | |
| JPS5632887A (en) | Tv signal conversion system using memory for video signal | |
| KR970022140A (en) | Multi-Standard Two-Screen Image Signal Processing Circuit | |
| KR900019493A (en) | Color image display device of color LED | |
| KR960009657A (en) | Method and apparatus for displaying a child screen of an image signal processing device having a single tuner | |
| KR960020547A (en) | Television with Frame Grabber | |
| KR890017946A (en) | Television and Video Tape Recorder Screen Art Circuits and Methods |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19951031 |
|
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 19951031 Comment text: Request for Examination of Application |
|
| PG1501 | Laying open of application | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 19980831 Patent event code: PE09021S01D |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19981128 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 19990223 Patent event code: PR07011E01D |
|
| PR1002 | Payment of registration fee |
Payment date: 19990224 End annual number: 3 Start annual number: 1 |
|
| PG1601 | Publication of registration | ||
| PR1001 | Payment of annual fee |
Payment date: 20020129 Start annual number: 4 End annual number: 4 |
|
| FPAY | Annual fee payment |
Payment date: 20030124 Year of fee payment: 5 |
|
| PR1001 | Payment of annual fee |
Payment date: 20030124 Start annual number: 5 End annual number: 5 |
|
| LAPS | Lapse due to unpaid annual fee | ||
| PC1903 | Unpaid annual fee |
Termination category: Default of registration fee Termination date: 20050111 |