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KR970003276A - 반도체메모리소자의 전기휴즈셀 - Google Patents

반도체메모리소자의 전기휴즈셀 Download PDF

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Publication number
KR970003276A
KR970003276A KR1019950018971A KR19950018971A KR970003276A KR 970003276 A KR970003276 A KR 970003276A KR 1019950018971 A KR1019950018971 A KR 1019950018971A KR 19950018971 A KR19950018971 A KR 19950018971A KR 970003276 A KR970003276 A KR 970003276A
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KR
South Korea
Prior art keywords
conductive type
electric fuse
semiconductor substrate
conductive
diffusion region
Prior art date
Application number
KR1019950018971A
Other languages
English (en)
Other versions
KR0157345B1 (ko
Inventor
최정혁
이정형
김동준
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950018971A priority Critical patent/KR0157345B1/ko
Priority to US08/670,506 priority patent/US5661323A/en
Priority to JP17114596A priority patent/JP3662351B2/ja
Publication of KR970003276A publication Critical patent/KR970003276A/ko
Application granted granted Critical
Publication of KR0157345B1 publication Critical patent/KR0157345B1/ko

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Fuses (AREA)

Abstract

본 발명은 제1도전형의 반도체기판에 형성된 전기휴즈셀에 관한 것으로서, 상기 반도체기판과는 제2도전형의 웰에 의해격리된 제1도전형의 웰과, 상기 제1도전형의 웰내에서 서로 소정거리로 이격되어 형성된 제2도전형의 제1 및 제2확산영역과, 상기 제1확산영역내에 형성된 제1도전형의 확산영역과, 상기 반도체기판의 상부에 형성되고 상기 제1확산영역에 연결된 도전층을 구비한다.

Description

반도체메모리소자의 전기휴즈셀
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 전기휴즈회로의 구성을 보여주는 도면, 제4도는 제3도에 사용된 휴즈의 단면구조를 보여주는 도면.

Claims (5)

  1. 제1도전형의 반도체기판에 형성된 전기휴즈셀에 있어서, 상기 반도체기판과는 제2도전형의 웰에 의해 격리된 제1도전형의 웰과, 상기 제1도전형의 웰내에서 서로 소정거리로 이격되어 형성된 제2도전형의 제1 및 제2확산영역과,상기 반도체기판의 상부에 형성되고 상기 제1확산영역에 연결된 도전층을 구비함을 특징으로 하는 전기휴즈셀.
  2. 제1도전형의 반도체기판에 형성된 전기휴즈셀에 있어서, 상기 반도체기판과는 제2도전형의 웰에 의해 격리된 제1도전형의 웰과, 상기 제1도전형의 웰내에서 서로 소정거리로 이격되어 형성된 제2도전형의 제1 및 제2확산영역과,상기 제1확산영역내에 형성된 제1도전형의 확산영역과, 상기 반도체기판의 상부에 형성되고 상기 제1도전형의 확산영역에연결된 도전층을 구비함을 특징으로 하는 전기휴즈셀.
  3. 전기휴즈회로에 있어서, 전원과 출력터미널사이에 연결되고 제어신호에 게이트가 접속된 부하트랜지스터와, 상기 출력터미널에 각각 연결된 복수개의 휴즈들과, 상기 휴즈들의 각각에 에미터가 연결된 복수개의 제1바이폴라트랜지스터들과, 상기 제1바이폴라트랜지스터들의 베이스와 컬렉터에 컬렉터와 베이스가 각각 연결된 복수개의 제2바이폴라트랜지스터들과, 상기 제1바이폴라트랜지스터들의 베이스에 드레인이 각각 연결되고 제1전압들의 각각에 게이트가 연결되고상기 제2바이폴라트랜지스터들의 에미터와 함께 접지전압에 소오스가 연결된 복수개의 제1선택트랜지스터들을 구비함을특징으로 하는 전기휴즈 회로.
  4. 제3항에 있어서, 상기 제1바이폴라트랜지스터들의 각 에미터와 소오스라인 사이에 채널이 연결되고 제2전압들의 각각에 게이트가 연결된 복수개의 제2선택트랜지스터들을 구비함을 특징으로 하는 전기 휴즈회로.
  5. 전기휴즈에 있어서, 전압단자에 접속되는 컨택영역을 포함하는 컨택패턴의 폭이 절단위치를 포함하는 휴징패턴의 폭보다 적어도 넓고, 상기 컨택패턴과 상기 휴징패턴이 상기 절단위치에서 서로 접하는 각도가 85∼95°임을 특징으로 하는 전기휴즈.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950018971A 1995-06-30 1995-06-30 반도체 메모리 소자의 전기 휴즈셀 KR0157345B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950018971A KR0157345B1 (ko) 1995-06-30 1995-06-30 반도체 메모리 소자의 전기 휴즈셀
US08/670,506 US5661323A (en) 1995-06-30 1996-06-27 Integrated circuit fuse programming and reading circuits
JP17114596A JP3662351B2 (ja) 1995-06-30 1996-07-01 半導体装置のヒューズ素子

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950018971A KR0157345B1 (ko) 1995-06-30 1995-06-30 반도체 메모리 소자의 전기 휴즈셀

Publications (2)

Publication Number Publication Date
KR970003276A true KR970003276A (ko) 1997-01-28
KR0157345B1 KR0157345B1 (ko) 1998-12-01

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Country Status (3)

Country Link
US (1) US5661323A (ko)
JP (1) JP3662351B2 (ko)
KR (1) KR0157345B1 (ko)

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Also Published As

Publication number Publication date
JP3662351B2 (ja) 2005-06-22
KR0157345B1 (ko) 1998-12-01
US5661323A (en) 1997-08-26
JPH0917878A (ja) 1997-01-17

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