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KR960036140A - 반도체 장치 제작 방법 - Google Patents

반도체 장치 제작 방법 Download PDF

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KR960036140A
KR960036140A KR1019960008240A KR19960008240A KR960036140A KR 960036140 A KR960036140 A KR 960036140A KR 1019960008240 A KR1019960008240 A KR 1019960008240A KR 19960008240 A KR19960008240 A KR 19960008240A KR 960036140 A KR960036140 A KR 960036140A
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semiconductor device
hydrogen
manufacturing
heating
nickel
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슌페이 야마자키
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야마자끼 슌페이
한도타이 에네루기 겐큐쇼 주식회사
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
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    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6745—Polycrystalline or microcrystalline silicon

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Abstract

규소 반도체를 이용하는 반도체 장치 제작에 있어서, 가열 처리는 수소가 들어있는 분위기에서 수행된다. 이때에, 활성 수소는 가열된 니켈 자료가 상기 수소와 접촉하므로 생성된다. 예를들면, 내면이 상기 니켈 재료로 덮혀 잇는 배관이 히터에 의해서 가열되고 수소 기체가 사기 배관으로 주입되어 활성 수소가 생성되므로 약한 내열성을 갖는 수지 기판 상에 형성된 반도체 장치는 소정의 시간 주기 동안 온도가 150℃±20℃로 유지되는 동안에 활성 수소를 이용하여 가열냉각된다.

Description

반도체 장치 제작 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1도는 수소 열처리를 하기 위한 장치의 개요도.

Claims (21)

  1. 처리실안의 기판 상에 규소를 함유하는 반도체막 형성단계 ; 상기 반도체 상에 절연막을 형성하는 단계 ; 상기 절연막 상에 알루미늄을 함유하는 배선 형성 단계 ; 상기 처리실에서 수소 활성종을 생성하는 단계 ; 및 상기 수소 활성종을 사용하여 가열냉각(annealing)을 행하는 단계들을 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  2. 제 1항에 있어서, 가열냉각의 온도가 150℃±20℃의 온도 범위인 것을 특징으로 하는 반도체 장치 제작 방법.
  3. 제 1항에 있어서, 상기 기판이 유리 기판으로 구성되는 것을 특징으로 하는 반도체 장치 제작 방법.
  4. 제 1항에 있어서, 상기 기판이 수지 기판으로 구성되는 것을 특징으로 하는 반도체 장치 제작 방법.
  5. 제 1항에 있어서, 상기 알루미늄이 상기 절연막으로 확산되지 않는 온도에서 가열냉각이 수행되는 것을 특징으로 하는 반도체 장치 제작 방법.
  6. 제 1항에 있어서, 상기 배선이 니켈을 함유하는 것을 특징으로 하는 반도체 장치 제작 방법.
  7. 제 1항에 있어서, 상기 생성 단계가 니켈을 함유하는 가열된 재료와 수소가 들어 있는 기체가 반응하는 단계를 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  8. 처리실에서 반도체 장치를 배치하는 단계 ; 상기 처리실에서 수소 활성종을 생성하는 단계 ; 및 150℃±20℃의 온도 범위로 상기 수소 활성종을 이용하여 상기 반도체 장치를 가열냉각하는 단계들을 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  9. 제 8항에 있어서, 상기 반도체 장치가 알루미늄을 함유하는 배선으로 구성되는 것을 특징으로 하는 반도체 장치 제작 방법.
  10. 제 9항에 있어서, 상기 배선이 니켈을 함유하는 것을 특징으로 하는 반도체 장치 제작 방법.
  11. 제 8항에 있어서, 상기 생성 단계가 니켈을 함유하는 가열된 재료와 수소가 들어 있는 기체가 반응하는 단계를 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  12. 처리실에 반도체 장치를 배치하는 단계 ; 상기 처리실에 연결된 배관의 내면 상에 니켈을 함유하는 재료를 형성하는 단계 ; 상기 배관을 가열하는 단계 ; 니켈을 함유하는 가열된 상기 재료와 수소가 들어 있는 상기 기체와의 접촉에 의해 수소 활성종을 생성하기 위하여 상기 배관안으로 수소가 들어 있는 기체를 주입하는 단계 ; 및 상기 수소 활성종을 이용하여 반도체 장치를 열처리하는 단계들을 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  13. 제 12항에 있어서, 상기 열처리의 온도가 150℃±20℃의 온도 범위인 것을 특징으로 하는 반도체 장치 제작 방법.
  14. 제 13항에 있어서, 상기 반도체 장치가 알루미늄을 함유하는 배선으로 구성되는 것을 특징으로 하는 반도체 장치 제작 방법.
  15. 제 14항에 있어서, 상기 배선이 니켈을 함유하는 것을 특징으로 하는 반도체 장치 제작 방법.
  16. 처리실에 반도체 집적 회로를 배치하는 단계 ; 상기 처리실에서 수소 활성종을 생성하는 단계 ; 및 상기 수소 활성종을 이용하여 반도체 집적 회로를 150℃±20℃의 온도 범위에서 가열냉각하는 단계들을 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  17. 제 16항에 있어서, 상기 반도체 집적 회로가 알루미늄을 함유하는 배선으로 구성되는 것을 특징으로 하는 반도체 장치 제작 방법.
  18. 제 17항에 있어서, 상기 배선이 니켈을 함유하는 것을 특징으로 하는 반도체 장치 제작 방법.
  19. 제 16항에 있어서, 상기 생성 단계가 니켈을 함유하는 가열된 재료와 수소가 들어있는 기체와 반응하는 단계를 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  20. 니켈을 함유하는 재료를 배치하는 단계 ; 배치된 상기 재료를 가열하는 단계 ; 수소 활성종을 생성하기 위하여 수소를 포함하는 기체가 가열된 상기 재료와 접촉하는 단계 ; 및 생성된 상기 수소 활성종을 이용하여 수지 기판 상에 형성된 반도체 장치를 가열냉각하는 단계들을 포함하는 것을 특징으로 하는 반도체 장치 제작 방법.
  21. 제 20항에 있어서, 상기 가열냉각의 온도가 150℃±20℃인 것을 특징으로 하는 반도체 장치 제작 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960008240A 1995-03-27 1996-03-26 반도체장치제작방법 Expired - Fee Related KR100306833B1 (ko)

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JP09440995A JP3499327B2 (ja) 1995-03-27 1995-03-27 表示装置の作製方法
JP95-94409 1995-03-27

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KR960036140A true KR960036140A (ko) 1996-10-28
KR100306833B1 KR100306833B1 (ko) 2001-12-17

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US (1) US5766977A (ko)
JP (1) JP3499327B2 (ko)
KR (1) KR100306833B1 (ko)
CN (1) CN1091947C (ko)
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JP3364081B2 (ja) 1995-02-16 2003-01-08 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5757456A (en) 1995-03-10 1998-05-26 Semiconductor Energy Laboratory Co., Ltd. Display device and method of fabricating involving peeling circuits from one substrate and mounting on other
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JP3729955B2 (ja) 1996-01-19 2005-12-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645379B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
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US5766977A (en) 1998-06-16
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