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KR960026546A - 반도체 소자분리막 형성 방법 - Google Patents

반도체 소자분리막 형성 방법 Download PDF

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Publication number
KR960026546A
KR960026546A KR1019940034511A KR19940034511A KR960026546A KR 960026546 A KR960026546 A KR 960026546A KR 1019940034511 A KR1019940034511 A KR 1019940034511A KR 19940034511 A KR19940034511 A KR 19940034511A KR 960026546 A KR960026546 A KR 960026546A
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KR
South Korea
Prior art keywords
device isolation
forming
isolation film
semiconductor device
film
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KR1019940034511A
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KR0151225B1 (ko
Inventor
이우진
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김주용
현대전자산업 주식회사
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Priority to KR1019940034511A priority Critical patent/KR0151225B1/ko
Publication of KR960026546A publication Critical patent/KR960026546A/ko
Application granted granted Critical
Publication of KR0151225B1 publication Critical patent/KR0151225B1/ko
Anticipated expiration legal-status Critical
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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 소자분리막이 형성될 예정된 반도체 기판 부위를 식각하여 트렌치를 형성하는 단계, 상기 트렌치 형성 부위의 반도체 기판 표면으로부터 소정깊이에 산소이온을 이온주입하는 단계, 산화공정을 통해 상기 산소 이온이 이온주입된 영역에 소자분리용 산화막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자분리막 형성 방법에 관한 것으로, 기판의 단차를 방지하고 소자분리 효과를 증대시키며 새부리 모양의 발생을 방지하는 양호한 프로파일을 갖는 소자분리막을 형성하는 효과가 있다.

Description

반도체 소자분리막 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 및 제2B도는 본 발명에 따른 소자 분리막 형성 공정도.

Claims (3)

  1. 소자분리막이 형성될 예정된 반도체 기판 부위를 식각하여 트펜치를 형성하는 단계, 상기 트렌치 형성 부위의 반도체 기판 표면으로부터 소정깊이에 산소이온을 이온주입하는 단계, 산화공정을 통해 상기 산소 이온이 이온주입된 영역에 소자분리용 산화막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자분리막 형성 방법.
  2. 제1항에 있어서, 상기 산소 이온주입 에너지는 20~50KeV인 것을 특징으로 하는 반도체 소자분리막 형성 방법.
  3. 제1항에 있어서, 상기 이온주입되는 불순물의 양은 1E15~1E16/㎠인 것을 특징으로 하는 반도체 소자분리막 형성 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940034511A 1994-12-15 1994-12-15 반도체 소자의 소자분리 방법 Expired - Fee Related KR0151225B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940034511A KR0151225B1 (ko) 1994-12-15 1994-12-15 반도체 소자의 소자분리 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940034511A KR0151225B1 (ko) 1994-12-15 1994-12-15 반도체 소자의 소자분리 방법

Publications (2)

Publication Number Publication Date
KR960026546A true KR960026546A (ko) 1996-07-22
KR0151225B1 KR0151225B1 (ko) 1998-12-01

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ID=19401743

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940034511A Expired - Fee Related KR0151225B1 (ko) 1994-12-15 1994-12-15 반도체 소자의 소자분리 방법

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Publication number Publication date
KR0151225B1 (ko) 1998-12-01

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