KR930700970A - 건식 스핀온 유리층(sog)공정 - Google Patents

건식 스핀온 유리층(sog)공정

Info

Publication number: KR930700970A
Authority: KR; South Korea
Prior art keywords: sog; glass layer; dry spin; spin; dry
Prior art date: 1990-05-29

Application number

KR1019920703065A

Other languages

English (en)

Other versions

KR100219387B1 (ko

Inventor

루스 쾰렛

Original Assignee

미텔 코포레이션

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1990-05-29

Filing date

1992-11-30

Publication date

1993-03-16

1991-05-28 Application filed by 미텔 코포레이션 filed Critical 미텔 코포레이션

1993-03-16 Publication of KR930700970A publication Critical patent/KR930700970A/ko

1999-09-01 Application granted granted Critical

1999-09-01 Publication of KR100219387B1 publication Critical patent/KR100219387B1/ko

Classifications

- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67173—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers in-line arrangement
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31695—Deposition of porous oxides or porous glassy oxides or oxide based porous glass
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/133—Reflow oxides and glasses

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Condensed Matter Physics & Semiconductors (AREA)
General Physics & Mathematics (AREA)
Manufacturing & Machinery (AREA)
Computer Hardware Design (AREA)
Microelectronics & Electronic Packaging (AREA)
Power Engineering (AREA)
Formation Of Insulating Films (AREA)
Micro-Organisms Or Cultivation Processes Thereof (AREA)

KR1019920703065A 1990-05-29 1991-05-28 반도체 웨이퍼를 평탄화하는 방법 KR100219387B1 (ko)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
CA2,017,719		1990-05-29
CA002017719A CA2017719C (en)	1990-05-29	1990-05-29	Moisture-free sog process
PCT/CA1991/000176 WO1991019316A1 (en)	1990-05-29	1991-05-28	Moisture-free sog process

Publications (2)

Publication Number	Publication Date
KR930700970A true KR930700970A (ko)	1993-03-16
KR100219387B1 KR100219387B1 (ko)	1999-09-01

Family

ID=4145085

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
KR1019920703065A KR100219387B1 (ko)	1990-05-29	1991-05-28	반도체 웨이퍼를 평탄화하는 방법

Country Status (7)

Country	Link
US (1)	US5470798A (ko)
EP (1)	EP0536160B1 (ko)
JP (1)	JP3249512B2 (ko)
KR (1)	KR100219387B1 (ko)
CA (1)	CA2017719C (ko)
DE (1)	DE69129987D1 (ko)
WO (1)	WO1991019316A1 (ko)

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US5376590A (en) *	1992-01-20	1994-12-27	Nippon Telegraph And Telephone Corporation	Semiconductor device and method of fabricating the same
JPH06204212A (ja) *	1992-08-21	1994-07-22	Sgs Thomson Microelectron Inc	平坦化技術
DE634699T1 (de) *	1993-07-16	1996-02-15	Semiconductor Systems Inc	Gruppiertes fotolithografisches System.
US5766824A (en) *	1993-07-16	1998-06-16	Semiconductor Systems, Inc.	Method and apparatus for curing photoresist
JPH07169020A (ja) *	1993-09-21	1995-07-04	Eastman Kodak Co	磁気薄膜ヘッドのための基板表面の平坦化プロセス
DE4432294A1 (de) *	1994-09-12	1996-03-14	Telefunken Microelectron	Verfahren zur Reduzierung der Oberflächenrekombinationsgeschwindigkeit in Silizium
KR970042941A (ko) *	1995-12-29	1997-07-26	베일리 웨인 피	기계적 화학적 폴리싱 공정을 위한 폴리싱 합성물
US5645736A (en) *	1995-12-29	1997-07-08	Symbios Logic Inc.	Method for polishing a wafer
US6455394B1 (en)	1998-03-13	2002-09-24	Micron Technology, Inc.	Method for trench isolation by selective deposition of low temperature oxide films
US7157385B2 (en) *	2003-09-05	2007-01-02	Micron Technology, Inc.	Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry
KR19990055294A (ko) *	1997-12-27	1999-07-15	김영환	반도체 소자의 절연막 형성 장치
EP2317567A1 (en)	1998-08-19	2011-05-04	The Trustees Of Princeton University	Organic photosensitive optoelectronic device
US6451415B1 (en)	1998-08-19	2002-09-17	The Trustees Of Princeton University	Organic photosensitive optoelectronic device with an exciton blocking layer
US6300219B1 (en)	1999-08-30	2001-10-09	Micron Technology, Inc.	Method of forming trench isolation regions
TW490756B (en)	1999-08-31	2002-06-11	Hitachi Ltd	Method for mass production of semiconductor integrated circuit device and manufacturing method of electronic components
US6897120B2 (en) *	2001-01-03	2005-05-24	Micron Technology, Inc.	Method of forming integrated circuitry and method of forming shallow trench isolation in a semiconductor substrate
WO2002058128A1 (en) *	2001-01-19	2002-07-25	Tokyo Electron Limited	Method and apparaturs for treating substrate
EP2259285B1 (en)	2001-05-16	2014-10-22	The Trustees Of Princeton University	High efficiency multi-color electro-phosphorescent OLEDs.
JP3656103B2 (ja) *	2001-09-19	2005-06-08	国立大学法人富山大学	液晶表示素子
US20030162372A1 (en) *	2002-02-26	2003-08-28	Yoo Woo Sik	Method and apparatus for forming an oxide layer
TW200504093A (en)	2003-05-12	2005-02-01	Dow Global Technologies Inc	Polymer composition and process to manufacture high molecular weight-high density polyethylene and film therefrom
US7125815B2 (en) *	2003-07-07	2006-10-24	Micron Technology, Inc.	Methods of forming a phosphorous doped silicon dioxide comprising layer
US7055912B2 (en) *	2003-09-23	2006-06-06	Terry Lynn Luscombe	Vehicle mounted utility apparatus with quick attachment means
US7053010B2 (en) *	2004-03-22	2006-05-30	Micron Technology, Inc.	Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells
US7101754B2 (en) *	2004-06-10	2006-09-05	Dalsa Semiconductor Inc.	Titanium silicate films with high dielectric constant
US7235459B2 (en)	2004-08-31	2007-06-26	Micron Technology, Inc.	Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
US7217634B2 (en) *	2005-02-17	2007-05-15	Micron Technology, Inc.	Methods of forming integrated circuitry
US7510966B2 (en) *	2005-03-07	2009-03-31	Micron Technology, Inc.	Electrically conductive line, method of forming an electrically conductive line, and method of reducing titanium silicide agglomeration in fabrication of titanium silicide over polysilicon transistor gate lines
US8012847B2 (en)	2005-04-01	2011-09-06	Micron Technology, Inc.	Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry
US7682977B2 (en) *	2006-05-11	2010-03-23	Micron Technology, Inc.	Methods of forming trench isolation and methods of forming arrays of FLASH memory cells
CN100595352C (zh) *	2007-07-17	2010-03-24	佳科太阳能硅(龙岩)有限公司	太阳能级多晶硅大锭的制备方法
US8105956B2 (en)	2009-10-20	2012-01-31	Micron Technology, Inc.	Methods of forming silicon oxides and methods of forming interlevel dielectrics
CN117447234A (zh) *	2023-10-17	2024-01-26	夸泰克(广州)新材料有限责任公司	一种耐超高温旋涂玻璃膜层制备方法

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FR2597372B3 (fr) *	1986-04-22	1988-07-08	Thomson Csf	Procede et appareil d'etalement de resine par centrifugation
US4775550A (en) *	1986-06-03	1988-10-04	Intel Corporation	Surface planarization method for VLSI technology
JPH0646632B2 (ja) *	1987-05-13	1994-06-15	富士通株式会社	スピンオングラス焼成方法及び装置
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JP2526683B2 (ja) *	1989-11-22	1996-08-21	三菱電機株式会社	薄膜形成装置
CA2017720C (en) *	1990-05-29	1999-01-19	Luc Ouellet	Sog with moisture-resistant protective capping layer
JPH04320032A (ja) *	1991-04-18	1992-11-10	Mitsubishi Electric Corp	半導体装置の製造方法

1990
- 1990-05-29 CA CA002017719A patent/CA2017719C/en not_active Expired - Fee Related
1991
- 1991-05-28 JP JP50968691A patent/JP3249512B2/ja not_active Expired - Lifetime
- 1991-05-28 DE DE69129987T patent/DE69129987D1/de not_active Expired - Lifetime
- 1991-05-28 US US07/965,264 patent/US5470798A/en not_active Expired - Lifetime
- 1991-05-28 WO PCT/CA1991/000176 patent/WO1991019316A1/en active IP Right Grant
- 1991-05-28 EP EP91909914A patent/EP0536160B1/en not_active Expired - Lifetime
- 1991-05-28 KR KR1019920703065A patent/KR100219387B1/ko not_active IP Right Cessation

Also Published As

Publication number	Publication date
JPH05508740A (ja)	1993-12-02
JP3249512B2 (ja)	2002-01-21
US5470798A (en)	1995-11-28
EP0536160A1 (en)	1993-04-14
WO1991019316A1 (en)	1991-12-12
DE69129987D1 (de)	1998-09-17
CA2017719C (en)	1999-01-19
CA2017719A1 (en)	1991-11-29
EP0536160B1 (en)	1998-08-12
KR100219387B1 (ko)	1999-09-01

Publication	Publication Date	Title
KR930700970A (ko)	1993-03-16	건식 스핀온 유리층(sog)공정
DE69033632D1 (de)	2000-10-26	Filterschicht
KR860004566A (ko)	1986-06-23	표면 광 처리방법
DE69228333D1 (de)	1999-03-18	Trockenätzverfahren
DK430888A (da)	1988-08-02	Optisk belysningsapparat
DE69126149D1 (de)	1997-06-26	Trockenätzverfahren
BR8703094A (pt)	1988-03-08	Dispositivo otico
DE69130085D1 (de)	1998-10-08	Figuredierungsgerät
FI94213B (fi)	1995-04-28	Optinen laite
DE3752140D1 (de)	1997-12-18	Trockenes Ätzverfahren
FI88448B (fi)	1993-01-29	Foerfarande foer taetning av en kabelfoergrening och en inlaeggsdel och arrangemang foer en kabelfoergrening
FI870452L (fi)	1987-08-14	Lentokentän valaistuslaite
DK311587A (da)	1987-12-21	Varmeindretninger
FI870193A (fi)	1987-07-22	Foerfarande och anordning foer avskinning av koett
KR870012599U (ko)	1987-08-05	냉각제습 건조장치
BR8405456A (pt)	1985-09-03	Disco de registro de superficie esticada
KR870013677U (ko)	1987-09-10	조명 장치
KR910003769A (ko)	1991-02-28	드라이에칭방법
KR920009487U (ko)	1992-06-16	유리 흡착기
KR880002113U (ko)	1988-04-07	연마 로울러
BR8600871A (pt)	1986-07-01	Entretenimento
KR870013676U (ko)	1987-09-10	조명 장치
KR870016450U (ko)	1987-11-30	활주로 표시등
KR880011593U (ko)	1988-08-26	유리닦게
RO94637A2 (ro)	1988-06-30	Aparat pentru determinarea glicemiei

Legal Events

Date	Code	Title	Description
1992-11-30	PA0109	Patent application	Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19921130
1993-03-16	PG1501	Laying open of application
1996-05-01	A201	Request for examination
1996-05-01	PA0201	Request for examination	Patent event code: PA02012R01D Patent event date: 19960501 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19921130 Comment text: Patent Application
1998-12-21	E902	Notification of reason for refusal
1998-12-21	PE0902	Notice of grounds for rejection	Comment text: Notification of reason for refusal Patent event date: 19981221 Patent event code: PE09021S01D
1999-05-10	E701	Decision to grant or registration of patent right
1999-05-10	PE0701	Decision of registration	Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19990510
1999-06-15	GRNT	Written decision to grant
1999-06-15	PR0701	Registration of establishment	Comment text: Registration of Establishment Patent event date: 19990615 Patent event code: PR07011E01D
1999-06-15	PR1002	Payment of registration fee	Payment date: 19990616 End annual number: 3 Start annual number: 1
1999-09-01	PG1601	Publication of registration
2002-06-16	LAPS	Lapse due to unpaid annual fee
2002-06-16	PC1903	Unpaid annual fee	Termination category: Default of registration fee Termination date: 20030610