KR920008851A - 반도체장치 및 그 제조방법 - Google Patents
반도체장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR920008851A KR920008851A KR1019910018207A KR910018207A KR920008851A KR 920008851 A KR920008851 A KR 920008851A KR 1019910018207 A KR1019910018207 A KR 1019910018207A KR 910018207 A KR910018207 A KR 910018207A KR 920008851 A KR920008851 A KR 920008851A
- Authority
- KR
- South Korea
- Prior art keywords
- silicon oxide
- oxide film
- semiconductor substrate
- convex pattern
- forming
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 23
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims 7
- 238000005530 etching Methods 0.000 claims 2
- 238000000151 deposition Methods 0.000 claims 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
Description
Claims (2)
- 반도체기판과, 상기 반도체기판의 위에 형성된 오목볼록패턴과, 상기 오목볼록패턴의 표면을 피복하도록 상기 반도체기판의 위에 형성된 내크랙성이 우수한 제1의 실리콘산화막과, 상기 제1의 실리콘산화막의 표면에 존재하는 오목부를 메꾸고, 또한 상기 오목볼록패턴을 덮도록 상기 제1의 실리콘 산화막의 위에 퇴적된 스텝커버리지성이 우수한 제2의 실리콘산화막과, 상기 제2의 실리콘산화막의 표면을 평탄화하기 위하여 상기 제2의 실리콘산화막의 표면에 존재하는 오목부에 메꾸어진 매입특성이 우수한 제3의 실리콘산화막과, 상기 제2의 실리콘산화막 및 상기 제3의 실리콘 산화막을 포함하는 상기 반도체기판의 위에 형성된 제4의 실리콘산화막과를 구비한 반도체장치.
- 반도체기판의 위에 오목보록 패턴을 형성하는 공정과, 상기 오목볼록패턴의 표면을 피복하도록 상기 반도체 기판의 위에 내크택성이 우수한 제1의 실리콘산화막을 형성하는 공정과, 상기 오목볼록패턴의 오목부를 메꾸고, 또한 해당오목볼록 패턴을 덮도록 상기 제1의 실리콘산화막의 위에 스텝커버리지성이 우수한 제2의 실리콘산화막을 퇴적하는 공정과, 상기 제2의 실리콘산화막을 소정의 막두께로 될때까지 에칭하는 공정과, 엥칭후의 상기 제2의 실리콘산화막의 표면에 존재하느 오목부에 매입특성이 우수한 제3의 실리콘산화막을 매입하는 공정과 상기 제2의 실리콘 산화막 및 상기 제3의 실리콘산화막을 포함하는 상기 반도체기판의 위에 제4의 실리콘산화막을 형성하는 공정과, 를 구비한 반도체장치의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP90-294423 | 1990-10-30 | ||
JP2294423A JP2640174B2 (ja) | 1990-10-30 | 1990-10-30 | 半導体装置およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
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KR920008851A true KR920008851A (ko) | 1992-05-28 |
Family
ID=17807571
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019910018207A KR920008851A (ko) | 1990-10-30 | 1991-10-16 | 반도체장치 및 그 제조방법 |
Country Status (3)
Country | Link |
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US (3) | US5319247A (ko) |
JP (1) | JP2640174B2 (ko) |
KR (1) | KR920008851A (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100450428B1 (ko) * | 2000-11-10 | 2004-10-01 | 정헌영 | 두부제조용 대두건조분말 및 그 제조방법 |
KR101036980B1 (ko) * | 2008-09-12 | 2011-05-25 | 주식회사 동성식품 | 탈피대두분을 이용한 고품질 면 제조방법 |
Families Citing this family (230)
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US6146135A (en) * | 1991-08-19 | 2000-11-14 | Tadahiro Ohmi | Oxide film forming method |
JPH05243402A (ja) * | 1992-03-03 | 1993-09-21 | Nec Corp | 半導体装置の製造方法 |
JP3093429B2 (ja) * | 1992-04-28 | 2000-10-03 | 日本電気株式会社 | 半導体装置の製造方法 |
FR2692598B1 (fr) * | 1992-06-17 | 1995-02-10 | Air Liquide | Procédé de dépôt d'un film contenant du silicium à la surface d'un substrat métallique et procédé de traitement anti-corrosion. |
JP2668490B2 (ja) * | 1992-12-10 | 1997-10-27 | 三星電子株式会社 | マスクrom製造方法 |
JP3158749B2 (ja) * | 1992-12-16 | 2001-04-23 | ヤマハ株式会社 | 半導体装置 |
US5605857A (en) * | 1993-02-12 | 1997-02-25 | Micron Technology, Inc. | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells |
JPH0766287A (ja) * | 1993-08-23 | 1995-03-10 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2836474B2 (ja) * | 1993-12-15 | 1998-12-14 | 日本電気株式会社 | 磁気抵抗素子とその製造方法 |
US5395785A (en) * | 1993-12-17 | 1995-03-07 | Sgs-Thomson Microelectronics, Inc. | SRAM cell fabrication with interlevel dielectric planarization |
JPH088209A (ja) * | 1994-01-10 | 1996-01-12 | Cypress Semiconductor Corp | 半導体装置の製造のための除去されるポストの処理方法 |
US5628869A (en) * | 1994-05-09 | 1997-05-13 | Lsi Logic Corporation | Plasma enhanced chemical vapor reactor with shaped electrodes |
JPH0855968A (ja) * | 1994-08-10 | 1996-02-27 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JPH0878406A (ja) * | 1994-09-08 | 1996-03-22 | Sony Corp | 酸化膜の成膜方法 |
US5530293A (en) | 1994-11-28 | 1996-06-25 | International Business Machines Corporation | Carbon-free hydrogen silsesquioxane with dielectric constant less than 3.2 annealed in hydrogen for integrated circuits |
US5652084A (en) * | 1994-12-22 | 1997-07-29 | Cypress Semiconductor Corporation | Method for reduced pitch lithography |
US5861345A (en) * | 1995-05-01 | 1999-01-19 | Chou; Chin-Hao | In-situ pre-PECVD oxide deposition process for treating SOG |
US5955786A (en) * | 1995-06-07 | 1999-09-21 | Advanced Micro Devices, Inc. | Semiconductor device using uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines |
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- 1991-10-25 US US07/781,342 patent/US5319247A/en not_active Expired - Lifetime
-
1994
- 1994-04-05 US US08/223,192 patent/US5459105A/en not_active Expired - Lifetime
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KR100450428B1 (ko) * | 2000-11-10 | 2004-10-01 | 정헌영 | 두부제조용 대두건조분말 및 그 제조방법 |
KR101036980B1 (ko) * | 2008-09-12 | 2011-05-25 | 주식회사 동성식품 | 탈피대두분을 이용한 고품질 면 제조방법 |
Also Published As
Publication number | Publication date |
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JPH04167429A (ja) | 1992-06-15 |
US5319247A (en) | 1994-06-07 |
US5721156A (en) | 1998-02-24 |
US5459105A (en) | 1995-10-17 |
JP2640174B2 (ja) | 1997-08-13 |
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