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KR920006733A - 박막작성방법 - Google Patents

박막작성방법 Download PDF

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KR920006733A
KR920006733A KR1019910016251A KR910016251A KR920006733A KR 920006733 A KR920006733 A KR 920006733A KR 1019910016251 A KR1019910016251 A KR 1019910016251A KR 910016251 A KR910016251 A KR 910016251A KR 920006733 A KR920006733 A KR 920006733A
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reaction gas
substrate
thin film
vacuum vessel
vacuum
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겐이찌 아께따가와
쥰로오 사까이
도오루 다쓰미
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야스다 스스무
니찌덴 아네루바 가부시끼가이샤
세끼모도 다다히로
닛뽄 덴끼 가부시끼가이샤
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
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    • H01L21/02387Group 13/15 materials
    • H01L21/02395Arsenides
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition

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Abstract

내용 없음

Description

박막작성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예에 사용된 장치의 구성도,
제2도는 Si2H6가스의 분자구조 모델,
제3도는 본 발명의 실시예에 있어서 산화막상에 플리실리콘의 핵 형성이 없는 경우의 사진으로 (a)는 RHEED상의 사진, (b)는 표면의 SEM상의 사진.

Claims (13)

  1. 「/Γ 1.적어도 2종의 재질로 표면이 구성된 기판상에 적어도 1종의 재질의 표면상에만 박막을 형성시키는 방법에 있어서, ⅰ)기판을 진공용기내에 수용하고, 진공용기내를 진공배기시켜 소정의 압력에 달한후, 진공용기내에 반응가스를 도입하고, ii)반응가스를 공급한 진공용기내의 압력을 반응가스분자의 평균자유행정(d)이, 진공용기내의 기판과 진공용기의 진공측 노출벽과의 사이의 최단거리(L)보다 길어지는 (d)L)압력 영역에 설정하고, ⅲ)기판표면을 구성한 적어도 2종의 재질중 한쪽의 재질상에만 박막을 성장시켜, 진공용기내에 도입된 반응가스의 공급총량이 다른쪽의 재질상에서 박막이 발생하는데 필요한 만큼의 양에 달하는때에 반응가스의 진공용기내에의 도입을 정지시키는 것을 특징으로 하는 박막작성방법.
  2. 적어도 2종의 재질로 표면이 구성된 기판상에 적어도 1종의 재질 표면상에만 박막을 작성하는 방법에 있어서, ⅰ)기판을 진공용기내에 수용하고, 진공용기내를 진공배기시켜 소정의 압력에 달한후, 진공용기내에 반응가스를 도입하고, ⅱ)반응가스를 공급한 진공용기내의 압력을 반응가스분자의 평균자유행정(d)이, 진공용기내의 기판과 진공용기의 진공측 노출벽과의 사이의 최단거리(L)보다 길게되는 (d〉L)압력 영역에 설정하고, ⅲ)기판표면을 구성한 적어도 2종의 재질중 한쪽의 재질상에만 박막을 성장시켜, 기판에 반응가스 분자가 날아오는 총량이 다른쪽의 재질상에서 박막이 발생하는데 필요한 만큼의 양에 달하는때에 반응가스의 진공용기내에의 도입을 정지시키는 것을 특징으로 하는 박막작성방법.
  3. 제1항 또는 제2항에 있어서, 기판의 한쪽의 재질의 표면에서 성장하는 박막은 에피택셜성장의 박막으로 하는 것을 특징으로 하는 박막작성방법.
  4. 제1항 또는 제2항에 있어서, 반응가스를 공급한 진공용기내의 압력은 1.5 ×10-2Torr 이하에 설정하는 특징으로 하는 박막작성방법.
  5. 제1항에 있어서, 진공용기내에 공급한 반응가스의 총량은 기판의 온도설정으로 제어하는 것을 특징으로 하는 박막작성방법.
  6. 제1항 또는 제2항에 있어서, 기판의 표면이 SIO2와 Si로 구성되고, 반응가스를 Si2H6가스로하여 Si의 표면에만 에피택셜 Si막을 성장시키는 것을 특징으로 하는 박막제조방법.
  7. 제1항 또는 제2항에 있어서, 기판의 표면이 Si3H4와 Si로 구성되고, 반응가스를 Si2H6가스로하여 Si의 표면에만 에피택셜 Si막을 성장시키는 것을 특징으로 하는 박막제조방법.
  8. 제1항 또는 제2항에 있어서, 기판의 표면을 구성한 적어도 2종의 재질은 반응가스에 대하여 부착계수가 각각 상위한 것을 특징으로 하는 박막작성방법.
  9. 제2항에 있어서, 기판에 반응가스분자가 날아오는 총량 Γcri는 다음식으로 구해지는 것을 특징으로 하는 박막작성방법:
    여기서, T는 반응가스의 온도, M은 반응가스분자의 분자량, NA는 아보가도로수, P는 반응가스의 압력을 나타내며, 다시 t cri는 압력(P)으로 했을 때의 반응가스의 공급속도(v)로, 다른쪽의 재질상에서 박막이 발생했을 때의 반응가스의 공급총량(Qc)을 나눈값이다.
  10. 제2항에 있어서, 기판에 반응가스분자가 날아오는 총량은 기판의 온도설정으로 제어하는 것을 특징으로 하는 박막 작성방법.
  11. 제2항에 있어서, 기판의 표면은 SIO2와 Si로 구성되고, 반응가스를 Si2H6가스로 하고, 기판의 온도와 반응가스의 임계분자 총량사이에서 다음 조건으로한 것을 특징으로 하는 박막작성방법.
  12. 제2항에 있어서, 어떤장치에서 반응가스를 공급했을 때의 반응가스의 공급속도(v)와 진공용기내의 압력(P)을 구한후, 이들의 값을 사용하여 임계공급량(Qc)을 다음식을 사용하여 계산으로 구하고, 이 임계공급량을 반응가스의 진공용기내에의 도입을 정지시키는 양으로 하는 것을 특징으로 하는 박막 작성방법.
    T는 반응가스의 온도, M은 반응가스의 분자량, NA는 아보가도로수, Γcri는 임계분자총량.
  13. 적어도 2종의 재질로 표면이 구성된 기판상에 적어도 1종의 재질이 표면상에만 박막을 작성하는 방법에 있어서, ⅰ)기판을 진공용기내에 수용하고, 진공용기내를 진공배기시켜 소정의 압력에 달한후, 진공용기내에 반응 가스를 도입하고, ⅱ반응가스를 공급한 진공용기내의 압력을 반응가스분자의 평균자유행정(d)이, 진공용기내의 기판과 진공용기의 진공측 노출벽과의 사이의 최단거리(L)보다 길게되는(d〉L)압력 영역에 설정하고, ⅲ)기판표면을 구성한 적어도 2종의 재질중 한쪽의 재질상에만 박막을 성장시켜, 진공용기내에 도입된 반응가스의 공급총량이 다른쪽의 재질상에서 박막이 발생하는데 필요한 만큼의 양에 달한 시점의 반응가스 공급총량을 측정하고 이후의 박막작성은 측정한 반응가스의 공급총량에 달하는때에 반응가스의 진공용기내에의 도입을 정지시키는 것을 특징으로 하는 박막작성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910016251A 1990-09-21 1991-09-18 박막작성방법 KR100190953B1 (ko)

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US6159852A (en) * 1998-02-13 2000-12-12 Micron Technology, Inc. Method of depositing polysilicon, method of fabricating a field effect transistor, method of forming a contact to a substrate, method of forming a capacitor
US6797558B2 (en) 2001-04-24 2004-09-28 Micron Technology, Inc. Methods of forming a capacitor with substantially selective deposite of polysilicon on a substantially crystalline capacitor dielectric layer
KR20020083767A (ko) * 2001-04-30 2002-11-04 주식회사 하이닉스반도체 선택적 에피택셜 성장 공정에서의 기판 세정 방법
US7085616B2 (en) * 2001-07-27 2006-08-01 Applied Materials, Inc. Atomic layer deposition apparatus

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US3717514A (en) * 1970-10-06 1973-02-20 Motorola Inc Single crystal silicon contact for integrated circuits and method for making same
DE2059116C3 (de) * 1970-12-01 1974-11-21 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung eines Halbleiterbauelementes
US4497683A (en) * 1982-05-03 1985-02-05 At&T Bell Laboratories Process for producing dielectrically isolated silicon devices
US4462847A (en) * 1982-06-21 1984-07-31 Texas Instruments Incorporated Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition
JPH0782996B2 (ja) * 1986-03-28 1995-09-06 キヤノン株式会社 結晶の形成方法
JPH0639357B2 (ja) * 1986-09-08 1994-05-25 新技術開発事業団 元素半導体単結晶薄膜の成長方法
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US4963506A (en) * 1989-04-24 1990-10-16 Motorola Inc. Selective deposition of amorphous and polycrystalline silicon

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EP0476684A3 (en) 1992-12-09
DE69129722T2 (de) 1999-05-06
TW205603B (ko) 1993-05-11
CA2051529A1 (en) 1992-03-22
KR100190953B1 (ko) 1999-06-15
US5441012A (en) 1995-08-15
EP0476684B1 (en) 1998-07-08
CA2051529C (en) 1999-08-24
EP0476684A2 (en) 1992-03-25
DE69129722D1 (de) 1998-08-13

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