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KR920003173A - 정보처리장치 - Google Patents

정보처리장치 Download PDF

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Publication number
KR920003173A
KR920003173A KR1019910012189A KR910012189A KR920003173A KR 920003173 A KR920003173 A KR 920003173A KR 1019910012189 A KR1019910012189 A KR 1019910012189A KR 910012189 A KR910012189 A KR 910012189A KR 920003173 A KR920003173 A KR 920003173A
Authority
KR
South Korea
Prior art keywords
interrupt request
information processing
processing device
request
delay
Prior art date
Application number
KR1019910012189A
Other languages
English (en)
Other versions
KR940011669B1 (ko
Inventor
가츠히토 후쿠오카
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR920003173A publication Critical patent/KR920003173A/ko
Application granted granted Critical
Publication of KR940011669B1 publication Critical patent/KR940011669B1/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Bus Control (AREA)
  • Computer And Data Communications (AREA)

Abstract

내용 없음

Description

정보처리장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명에 따른 정보처리장치의 구성을 나타낸 블럭도.

Claims (1)

  1. 복수의 지연인터럽트요구를 이 요구의 발생순서와 함께 기억하는 지연인터럽트요구 기억수단(9)과, 이 요구 기억수단(9)에 기억된 상기 지연인터럽트요구와 상기 발생순서에 따라 가장 오래된 지역인터럽트요구를 선택하는 선택수단(13)을 구비하여, 상기 선택수단(13)에 의해 선택된 가장 오래된 지연인터럽트요구에 대응한 인터럽트요구를 발생시키는 것을 특징으로 하는 정보처리장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910012189A 1990-07-17 1991-07-16 정보처리장치 KR940011669B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP02-187256 1990-07-17
JP2187256A JPH0474229A (ja) 1990-07-17 1990-07-17 情報処理装置

Publications (2)

Publication Number Publication Date
KR920003173A true KR920003173A (ko) 1992-02-29
KR940011669B1 KR940011669B1 (ko) 1994-12-23

Family

ID=16202790

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910012189A KR940011669B1 (ko) 1990-07-17 1991-07-16 정보처리장치

Country Status (3)

Country Link
US (1) US5363506A (ko)
JP (1) JPH0474229A (ko)
KR (1) KR940011669B1 (ko)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5461720A (en) * 1992-09-23 1995-10-24 International Business Machines Corporation System for increasing the efficiency of communications between controller and plurality of host computers by prohibiting retransmission of the same message for predetermined period of time
US5701501A (en) * 1993-02-26 1997-12-23 Intel Corporation Apparatus and method for executing an atomic instruction
US5745770A (en) * 1993-12-27 1998-04-28 Intel Corporation Method and apparatus for servicing simultaneous I/O trap and debug traps in a microprocessor
JPH0895798A (ja) * 1994-09-29 1996-04-12 Fujitsu Ltd データ処理装置
US5889973A (en) * 1995-03-31 1999-03-30 Motorola, Inc. Method and apparatus for selectively controlling interrupt latency in a data processing system
US5754866A (en) * 1995-05-08 1998-05-19 Nvidia Corporation Delayed interrupts with a FIFO in an improved input/output architecture
US5708817A (en) * 1995-05-31 1998-01-13 Apple Computer, Inc. Programmable delay of an interrupt
US5948093A (en) * 1996-02-09 1999-09-07 Advanced Micro Devices, Inc. Microprocessor including an interrupt polling unit configured to poll external devices for interrupts when said microprocessor is in a task switch state
US6115776A (en) * 1996-12-05 2000-09-05 3Com Corporation Network and adaptor with time-based and packet number based interrupt combinations
US5913049A (en) * 1997-07-31 1999-06-15 Texas Instruments Incorporated Multi-stream complex instruction set microprocessor
US6000029A (en) * 1997-11-03 1999-12-07 Motorola, Inc. Method and apparatus for affecting subsequent instruction processing in a data processor
US6185639B1 (en) * 1998-06-05 2001-02-06 International Business Machines Corporation System and method to reduce a computer system's interrupt processing overhead
US6477600B1 (en) * 1999-06-08 2002-11-05 Intel Corporation Apparatus and method for processing isochronous interrupts
JP2001022600A (ja) 1999-07-06 2001-01-26 Matsushita Electric Ind Co Ltd ディジタル信号処理装置
US6718413B1 (en) * 1999-08-31 2004-04-06 Adaptec, Inc. Contention-based methods for generating reduced number of interrupts
US6760799B1 (en) * 1999-09-30 2004-07-06 Intel Corporation Reduced networking interrupts
US7478186B1 (en) * 2004-06-03 2009-01-13 Integrated Device Technology, Inc. Interrupt coalescer for DMA channel
US7444449B2 (en) * 2006-02-09 2008-10-28 Sony Ericsson Mobile Communications Ab Method, computer program product and computer system for controlling execution of an interruption routine
JP5625710B2 (ja) 2010-10-05 2014-11-19 富士通セミコンダクター株式会社 シミュレーション装置、方法、及びプログラム
US9208113B2 (en) * 2013-01-15 2015-12-08 Apple Inc. Deferred inter-processor interrupts
EP4086776A1 (en) * 2014-03-24 2022-11-09 INTEL Corporation Syncronization of interrupt processing to reduce power consumption

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49123546A (ko) * 1973-03-30 1974-11-26
DE2937777C2 (de) * 1979-09-19 1982-04-08 Ibm Deutschland Gmbh, 7000 Stuttgart Steuereinrichtung in einer elektronischen Datenverarbeitungsanlage zur Programmunterbrechung und für die Durchführung erzwungener Operationen
US4271468A (en) * 1979-11-06 1981-06-02 International Business Machines Corp. Multiprocessor mechanism for handling channel interrupts
US4564903A (en) * 1983-10-05 1986-01-14 International Business Machines Corporation Partitioned multiprocessor programming system
DE3481872D1 (de) * 1984-12-31 1990-05-10 Ibm Geraet zur erkennung von ausserbetriebzustaenden bei einem nichtbedienten unterbrechungsgesteuerten prozessor.
JPS6491228A (en) * 1987-09-30 1989-04-10 Takeshi Sakamura Data processor
US4843541A (en) * 1987-07-29 1989-06-27 International Business Machines Corporation Logical resource partitioning of a data processing system
US4862352A (en) * 1987-09-16 1989-08-29 Motorola, Inc. Data processor having pulse width encoded status output signal
JPH0272435A (ja) * 1988-09-08 1990-03-12 Fuji Electric Co Ltd 中央演算処理装置

Also Published As

Publication number Publication date
JPH0474229A (ja) 1992-03-09
KR940011669B1 (ko) 1994-12-23
US5363506A (en) 1994-11-08

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