KR910020728A - 반도체 기억장치의 데이터버스 클램프회로 - Google Patents
반도체 기억장치의 데이터버스 클램프회로 Download PDFInfo
- Publication number
- KR910020728A KR910020728A KR1019910006085A KR910006085A KR910020728A KR 910020728 A KR910020728 A KR 910020728A KR 1019910006085 A KR1019910006085 A KR 1019910006085A KR 910006085 A KR910006085 A KR 910006085A KR 910020728 A KR910020728 A KR 910020728A
- Authority
- KR
- South Korea
- Prior art keywords
- data bus
- circuit
- memory cell
- cell array
- complementary
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Abstract
Description
Claims (1)
- 데이터 격납용의 메모리셀어레이와, 행어드레스 스트로브신호에 의하여 집어넣은 어드레스신호를 해독하여 상기 메모리셀어레이의 행방향을 선택하는 행어드레스디코더와, 열어드레스디코더인에이블 신호에 의거하여 어드레스힌호를 해독하여 상기 메모리셀어레이의 열방향을 선택하는 열 어드레스디코더와, 상기 메모리셀어레이로 부터 판독된 데이터를 전송하는 상보데이터버스와, 상기 상보데이터버스를 상기 풀업하는 데이터버스 풀업회로와, 상기 상보 데이터버스를 소정전위에 클램프하는 데이터버스 클램프회로와, 상기 상보데이터버스상의 데이터를 차동증폭하여 판독하는 차동 증폭형 판독회로를 구비한 반도체기억장치에 있어서, 상기 데이터버스 클램프 회로는 상기 행어드레스 스트로브신호의 액티브기간에 있어서 상기 상보 데이터버스의 전하를 방전하는 제1의 방전회로와, 상기 제1의 방전회로보다도 방전능력이 크고, 아울러 상기 행어드레스 스트로브신호의 액티브기간 개신후부터 상기 열어드레스 디코더 인에이블신호가 인에이블될때까지의 사이에, 상기 상보 데이터버스의전하를 방전하는 제2의 방전회로를, 가지는 것을 특징으로 하는 반도체기억장치의 데이터버스 클램프회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2142664A JPH0438697A (ja) | 1990-05-31 | 1990-05-31 | 半導体記憶装置のデータバスクランプ回路 |
JP2-142664 | 1990-05-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910020728A true KR910020728A (ko) | 1991-12-20 |
KR100203717B1 KR100203717B1 (ko) | 1999-06-15 |
Family
ID=15320627
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910006085A KR100203717B1 (ko) | 1990-05-31 | 1991-04-16 | 반도체 기억장치의 데이터버스 클램프회로 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5091886A (ko) |
EP (1) | EP0459314B1 (ko) |
JP (1) | JPH0438697A (ko) |
KR (1) | KR100203717B1 (ko) |
DE (1) | DE69121967T2 (ko) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5260904A (en) * | 1990-05-31 | 1993-11-09 | Oki Electric Industry Co., Ltd. | Data bus clamp circuit for a semiconductor memory device |
JPH0474382A (ja) * | 1990-07-17 | 1992-03-09 | Fujitsu Ltd | 半導体記憶装置 |
US5206550A (en) * | 1991-06-20 | 1993-04-27 | Texas Instruments, Incorporated | Amplifier with actively clamped load |
JPH05342872A (ja) * | 1992-06-05 | 1993-12-24 | Oki Micro Design Miyazaki:Kk | 半導体記憶装置 |
TW223172B (en) * | 1992-12-22 | 1994-05-01 | Siemens Ag | Siganl sensing circuits for memory system using dynamic gain memory cells |
KR0133973B1 (ko) * | 1993-02-25 | 1998-04-20 | 기다오까 다까시 | 반도체 기억장치 |
KR0158027B1 (ko) * | 1993-12-29 | 1999-02-01 | 모리시다 요이치 | 반도체집적회로 |
JP3248482B2 (ja) * | 1998-03-13 | 2002-01-21 | 日本電気株式会社 | 半導体記憶装置 |
AU2003295880A1 (en) * | 2002-11-27 | 2004-06-23 | University Of Toledo, The | Integrated photoelectrochemical cell and system having a liquid electrolyte |
US7667133B2 (en) * | 2003-10-29 | 2010-02-23 | The University Of Toledo | Hybrid window layer for photovoltaic cells |
WO2006110613A2 (en) * | 2005-04-11 | 2006-10-19 | The University Of Toledo | Integrated photovoltaic-electrolysis cell |
DE102005029872A1 (de) * | 2005-06-27 | 2007-04-19 | Infineon Technologies Ag | Speicherzelle, Lesevorrichtung für die Speicherzelle sowie Speicheranordnungen mit einer derartigen Speicherzelle und Lesevorrichtung |
US7417903B2 (en) * | 2005-09-29 | 2008-08-26 | Hynix Semiconductor Inc. | Core voltage generator and method for generating core voltage in semiconductor memory device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6194296A (ja) * | 1984-10-16 | 1986-05-13 | Fujitsu Ltd | 半導体記憶装置 |
US4694429A (en) * | 1984-11-29 | 1987-09-15 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
JPS62134894A (ja) * | 1985-12-06 | 1987-06-17 | Mitsubishi Electric Corp | 半導体記憶装置 |
US4961168A (en) * | 1987-02-24 | 1990-10-02 | Texas Instruments Incorporated | Bipolar-CMOS static random access memory device with bit line bias control |
-
1990
- 1990-05-31 JP JP2142664A patent/JPH0438697A/ja active Pending
-
1991
- 1991-04-16 KR KR1019910006085A patent/KR100203717B1/ko not_active IP Right Cessation
- 1991-05-24 EP EP91108445A patent/EP0459314B1/en not_active Expired - Lifetime
- 1991-05-24 DE DE69121967T patent/DE69121967T2/de not_active Expired - Fee Related
- 1991-05-28 US US07/706,206 patent/US5091886A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0459314A3 (en) | 1992-10-28 |
DE69121967T2 (de) | 1997-03-27 |
DE69121967D1 (de) | 1996-10-17 |
KR100203717B1 (ko) | 1999-06-15 |
US5091886A (en) | 1992-02-25 |
EP0459314B1 (en) | 1996-09-11 |
JPH0438697A (ja) | 1992-02-07 |
EP0459314A2 (en) | 1991-12-04 |
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