KR900017165A - 스탠다드셀방식의 반도체집적회로 - Google Patents
스탠다드셀방식의 반도체집적회로 Download PDFInfo
- Publication number
- KR900017165A KR900017165A KR1019900005897A KR900005897A KR900017165A KR 900017165 A KR900017165 A KR 900017165A KR 1019900005897 A KR1019900005897 A KR 1019900005897A KR 900005897 A KR900005897 A KR 900005897A KR 900017165 A KR900017165 A KR 900017165A
- Authority
- KR
- South Korea
- Prior art keywords
- standard cell
- semiconductor integrated
- cell
- standard
- power supply
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (3)
- 각각이 제1스탠다드셀이 열형태로 배치되어 이루어지는 스탠다드 셀열(31, 32) 과 각 셀열간에 설치되는 셀간을 접속시키기 위한 배선이 형성되는 배선영역(33)을 구비한 스탠다드셀방식의 반도체집적회로에 있어서, 상기스탠다드셀열은 적어도 1개의 제 2 스탠다드셀 (Cb, Cc, Cb12, Cb13, Cb15~Cb17, Cc33, Cb34)을 갖추고있으며, 이 제 2 스탠다드셀(Cb, Cc, Cb12, Cb13, Cb15~Cb17, Cc32, Cb33)은 상기 셀간을 연결하는 배선을형성하기 위한 내부 배선영역(13a, 13b, 22)을 구비하고 있는 것을 특징으로 하는 스탠다드셀방식의 반도체 집적회로.
- 제 1 항에 있어서, 상기 제 2 스탠다드셀(Cb, Cc, Cb12, Cb13, Cb15~Cb17, Cc32, Cb33, Cb34)의 내부배선영역에 형성되는 배선은 상기 셀열간에 평행하게 배치되어 있는 것을 특징으로 하는 스탠다드셀방식의 반도체집적회로.
- 제 1 항에 있어서, 상기 제 2 스탠다드셀(Cb)에 소정의 논리게이트를 형성하기 위한 회로소자영역(11)과, 이회로소자영역(11)에 형성되는 소자에 전원전압을 를 공급하는 전원선을 형성하기 위하여 전원선영역(12a, 12b)을 이또한 구비되어 있는 것을 특징으로 하는 스탠다드셀방식의 반도체집적회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1108713A JPH02285656A (ja) | 1989-04-27 | 1989-04-27 | スタンダードセル方式の半導体集積回路 |
JP01-108713 | 1989-04-27 | ||
JP108713 | 1989-04-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900017165A true KR900017165A (ko) | 1990-11-15 |
KR930010083B1 KR930010083B1 (ko) | 1993-10-14 |
Family
ID=14491706
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900005897A KR930010083B1 (ko) | 1989-04-27 | 1990-04-26 | 스탠다드셀방식의 반도체 집적회로 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5063430A (ko) |
JP (1) | JPH02285656A (ko) |
KR (1) | KR930010083B1 (ko) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2894814B2 (ja) * | 1990-09-28 | 1999-05-24 | 株式会社東芝 | スタンダード・セル方式の半導体集積回路 |
US5796129A (en) * | 1993-08-03 | 1998-08-18 | Seiko Epson Corp. | Master slice type integrated circuit system having block areas optimized based on function |
US5798541A (en) * | 1994-12-02 | 1998-08-25 | Intel Corporation | Standard semiconductor cell with contoured cell boundary to increase device density |
US5768146A (en) * | 1995-03-28 | 1998-06-16 | Intel Corporation | Method of cell contouring to increase device density |
US5952698A (en) * | 1995-09-07 | 1999-09-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Layout pattern for improved MOS device matching |
JP3349989B2 (ja) * | 1999-06-18 | 2002-11-25 | エヌイーシーマイクロシステム株式会社 | 半導体集積回路装置及びそのレイアウト方法及び装置 |
US7283381B2 (en) | 2000-08-17 | 2007-10-16 | David Earl Butz | System and methods for addressing a matrix incorporating virtual columns and addressing layers |
US6462977B2 (en) | 2000-08-17 | 2002-10-08 | David Earl Butz | Data storage device having virtual columns and addressing layers |
DE102004032708A1 (de) * | 2004-07-07 | 2006-02-09 | Robert Bosch Gmbh | Vorrichtung für eine passive Stabilisierung von Versorgungsspannungen eines Halbleiterbauelements |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5878450A (ja) * | 1981-11-04 | 1983-05-12 | Nippon Telegr & Teleph Corp <Ntt> | 半導体集積回路装置 |
JPS5887854A (ja) * | 1981-11-20 | 1983-05-25 | Nec Corp | マスタスライス方式lsi基板 |
JPS5979549A (ja) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | 半導体集積回路 |
JPS60175438A (ja) * | 1984-02-22 | 1985-09-09 | Hitachi Ltd | 半導体集積回路装置 |
JPH0680670B2 (ja) * | 1985-11-29 | 1994-10-12 | 日本電気株式会社 | 半導体集積回路装置 |
JPS6399545A (ja) * | 1987-09-28 | 1988-04-30 | Toshiba Corp | ビルディング・ブロック方式の集積回路 |
-
1989
- 1989-04-27 JP JP1108713A patent/JPH02285656A/ja active Pending
-
1990
- 1990-04-26 KR KR1019900005897A patent/KR930010083B1/ko not_active IP Right Cessation
-
1991
- 1991-01-30 US US07/649,139 patent/US5063430A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR930010083B1 (ko) | 1993-10-14 |
JPH02285656A (ja) | 1990-11-22 |
US5063430A (en) | 1991-11-05 |
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