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KR900012335A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법

Info

Publication number
KR900012335A
KR900012335A KR1019900000590A KR900000590A KR900012335A KR 900012335 A KR900012335 A KR 900012335A KR 1019900000590 A KR1019900000590 A KR 1019900000590A KR 900000590 A KR900000590 A KR 900000590A KR 900012335 A KR900012335 A KR 900012335A
Authority
KR
South Korea
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
KR1019900000590A
Other languages
English (en)
Other versions
KR930011027B1 (ko
Inventor
히로시 다케우치
Original Assignee
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바 filed Critical 가부시키가이샤 도시바
Publication of KR900012335A publication Critical patent/KR900012335A/ko
Application granted granted Critical
Publication of KR930011027B1 publication Critical patent/KR930011027B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/963Removing process residues from vertical substrate surfaces

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
KR1019900000590A 1989-01-18 1990-01-18 반도체장치의 제조방법 KR930011027B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP959589 1989-01-18
JP89-009595 1989-01-18

Publications (2)

Publication Number Publication Date
KR900012335A true KR900012335A (ko) 1990-08-03
KR930011027B1 KR930011027B1 (ko) 1993-11-19

Family

ID=11724682

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900000590A KR930011027B1 (ko) 1989-01-18 1990-01-18 반도체장치의 제조방법

Country Status (3)

Country Link
US (1) US5017513A (ko)
KR (1) KR930011027B1 (ko)
DE (1) DE4001372A1 (ko)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5204285A (en) * 1989-12-01 1993-04-20 Matsushita Electronics Corporation Method for patterning a metal layer
US5213996A (en) * 1990-07-04 1993-05-25 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for forming interconnection pattern and semiconductor device having such interconnection pattern
US5418397A (en) * 1990-07-04 1995-05-23 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having an interconnection pattern
JP2694395B2 (ja) * 1991-04-17 1997-12-24 三菱電機株式会社 半導体装置およびその製造方法
WO1992022084A1 (en) * 1991-05-21 1992-12-10 Advantage Production Technology, Inc. Organic preclean for improving vapor phase wafer etch uniformity
US5251225A (en) * 1992-05-08 1993-10-05 Massachusetts Institute Of Technology Quantum-well diode laser
US5462892A (en) * 1992-06-22 1995-10-31 Vlsi Technology, Inc. Semiconductor processing method for preventing corrosion of metal film connections
US5532191A (en) * 1993-03-26 1996-07-02 Kawasaki Steel Corporation Method of chemical mechanical polishing planarization of an insulating film using an etching stop
US5324689A (en) * 1993-07-28 1994-06-28 Taiwan Semiconductor Manufacturing Company Critical dimension control with a planarized underlayer
JP3407086B2 (ja) * 1994-06-17 2003-05-19 日本テキサス・インスツルメンツ株式会社 半導体装置の製造方法
US5449639A (en) * 1994-10-24 1995-09-12 Taiwan Semiconductor Manufacturing Company Ltd. Disposable metal anti-reflection coating process used together with metal dry/wet etch
JPH08153710A (ja) * 1994-11-30 1996-06-11 Toshiba Corp 半導体装置の製造方法
US5780315A (en) * 1995-09-11 1998-07-14 Taiwan Semiconductor Manufacturing Company, Ltd Dry etch endpoint method
US5767018A (en) * 1995-11-08 1998-06-16 Advanced Micro Devices, Inc. Method of etching a polysilicon pattern
US5795829A (en) * 1996-06-03 1998-08-18 Advanced Micro Devices, Inc. Method of high density plasma metal etching
US5776832A (en) * 1996-07-17 1998-07-07 Taiwan Semiconductor Manufacturing Company Ltd. Anti-corrosion etch process for etching metal interconnections extending over and within contact openings
US5798303A (en) * 1996-09-05 1998-08-25 Micron Technology, Inc. Etching method for use in fabrication of semiconductor devices
US6767840B1 (en) * 1997-02-21 2004-07-27 Canon Kabushiki Kaisha Wafer processing apparatus, wafer processing method, and semiconductor substrate fabrication method
US6576547B2 (en) 1998-03-05 2003-06-10 Micron Technology, Inc. Residue-free contact openings and methods for fabricating same
JP2000100749A (ja) * 1998-09-25 2000-04-07 Mitsubishi Electric Corp 半導体装置および半導体装置の製造方法
JP2000208767A (ja) * 1998-11-13 2000-07-28 Seiko Epson Corp 半導体装置の製造方法
JP3253604B2 (ja) 1998-11-13 2002-02-04 セイコーエプソン株式会社 半導体装置の製造方法
US6833084B2 (en) * 1999-04-05 2004-12-21 Micron Technology, Inc. Etching compositions
US6562726B1 (en) * 1999-06-29 2003-05-13 Micron Technology, Inc. Acid blend for removing etch residue
US7320942B2 (en) * 2002-05-21 2008-01-22 Applied Materials, Inc. Method for removal of metallic residue after plasma etching of a metal layer
US20060102197A1 (en) * 2004-11-16 2006-05-18 Kang-Lie Chiang Post-etch treatment to remove residues
WO2007045269A1 (en) * 2005-10-21 2007-04-26 Freescale Semiconductor, Inc. Method for cleaning a semiconductor structure and chemistry thereof
CN102339749B (zh) * 2010-07-16 2013-09-04 中芯国际集成电路制造(上海)有限公司 一种金属铝焊垫刻蚀方法
US10172558B2 (en) * 2015-09-10 2019-01-08 University Of Utah Research Foundation Structure and methodology for a shadow mask having hollow high aspect ratio projections

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3914138A (en) * 1974-08-16 1975-10-21 Westinghouse Electric Corp Method of making semiconductor devices by single step diffusion
US4183781A (en) * 1978-09-25 1980-01-15 International Business Machines Corporation Stabilization process for aluminum microcircuits which have been reactive-ion etched
US4544416A (en) * 1983-08-26 1985-10-01 Texas Instruments Incorporated Passivation of silicon oxide during photoresist burnoff
US4572759A (en) * 1984-12-26 1986-02-25 Benzing Technology, Inc. Troide plasma reactor with magnetic enhancement
US4867799A (en) * 1985-06-13 1989-09-19 Purusar Corporation Ammonium vapor phase stripping of wafers
JPS62111432A (ja) * 1985-11-08 1987-05-22 Fujitsu Ltd 半導体装置の製造方法
US4680085A (en) * 1986-04-14 1987-07-14 Ovonic Imaging Systems, Inc. Method of forming thin film semiconductor devices
US4889609A (en) * 1988-09-06 1989-12-26 Ovonic Imaging Systems, Inc. Continuous dry etching system

Also Published As

Publication number Publication date
DE4001372A1 (de) 1990-07-19
US5017513A (en) 1991-05-21
KR930011027B1 (ko) 1993-11-19

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