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KR870008452A - 한쌍의 데이타 처리장치간에 데이타를 전송시키기 위한 시스템 - Google Patents

한쌍의 데이타 처리장치간에 데이타를 전송시키기 위한 시스템 Download PDF

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Publication number
KR870008452A
KR870008452A KR860010888A KR860010888A KR870008452A KR 870008452 A KR870008452 A KR 870008452A KR 860010888 A KR860010888 A KR 860010888A KR 860010888 A KR860010888 A KR 860010888A KR 870008452 A KR870008452 A KR 870008452A
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KR
South Korea
Prior art keywords
data
data processing
pair
memory
processing units
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Application number
KR860010888A
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English (en)
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KR900009117B1 (ko
Inventor
존 블레빈스 발라드
개리 컬파 윌리암
리챠드 매시스 죠셉
Original Assignee
하워드 지, 피거로아
인터내셔널 비지네스 머신즈 코포레이션
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Application filed by 하워드 지, 피거로아, 인터내셔널 비지네스 머신즈 코포레이션 filed Critical 하워드 지, 피거로아
Publication of KR870008452A publication Critical patent/KR870008452A/ko
Application granted granted Critical
Publication of KR900009117B1 publication Critical patent/KR900009117B1/ko

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)

Abstract

내용 없음

Description

한쌍의 데이타 처리장치간에 데이타를 전송시키기 위한 시스템
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 3 도는 본 발명에 따르는 다중처리가 데이타 처리 시스템의 블럭 다이어그램.

Claims (1)

  1. 한상의 데이타 처리장치간에 데이타를 전송시키기 위한 시스템에 있어서,
    상기 시스템은,
    상기 데이타 처리장치 각각의 내에 랜덤 액세서부와 관련 순차 엑세스부를 갖는 메모리와,
    각각의 상기 메모리의 각 상기 랜덤 엑세스부와 그것과 관련된 순차 엑세스부간에 데이타를 전송시키기 위한 수단과 :
    각각의 상기 메모리의 상기 순차 엑세스부를 그것간의 데이타 흐름을 허용하도록 상호 연결시키기 위한 수단을 구비하며,
    상기 메모리의 상기 순차 엑세스부간의 상기 데이타 흐름은 상기 시스템의 나머지의 것과 비동기적으로 발생하는 것을 특징으로 하는 한쌍의 데이타 처리장치간에 데이타를 전송시키기 위한 시스템.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860010888A 1986-02-24 1986-12-18 데이타 전송 시스템 KR900009117B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US83188586A 1986-02-24 1986-02-24
US831,885 1986-02-24
US831885 1986-02-24

Publications (2)

Publication Number Publication Date
KR870008452A true KR870008452A (ko) 1987-09-26
KR900009117B1 KR900009117B1 (ko) 1990-12-22

Family

ID=25260101

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860010888A KR900009117B1 (ko) 1986-02-24 1986-12-18 데이타 전송 시스템

Country Status (7)

Country Link
EP (1) EP0234182A1 (ko)
JP (1) JPS62200448A (ko)
KR (1) KR900009117B1 (ko)
CN (1) CN1010262B (ko)
AR (1) AR240764A1 (ko)
BR (1) BR8700436A (ko)
IN (1) IN168469B (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2627878A1 (fr) * 1988-02-29 1989-09-01 Commissariat Energie Atomique Dispositif de traitement numerique de signaux
JP2584113B2 (ja) * 1989-07-21 1997-02-19 松下電器産業株式会社 データ転送方法及びデータ転送装置
IT1239596B (it) * 1990-02-16 1993-11-10 Sincon Spa Sistemi Imformativi Rete di collegamento per la gestione di dati in elaborazioni parallele.

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS602710B2 (ja) * 1977-04-13 1985-01-23 株式会社東芝 複合計算機システム
JPS6016664B2 (ja) * 1977-10-28 1985-04-26 豊田工機株式会社 デ−タ転送装置
JPS56135261A (en) * 1980-03-24 1981-10-22 Nec Corp Interprocessor information transfer system
JPS585867A (ja) * 1981-06-30 1983-01-13 エレベ−タ−・ゲ−エムベ−ハ− デ−タ伝送方法および装置
JPS585822A (ja) * 1981-06-30 1983-01-13 エレベ−タ−・ゲ−エムベ−ハ− 入出力デ−タ転送方法および装置
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
AU568490B2 (en) * 1982-05-07 1988-01-07 Digital Equipment Corporation Memory-to-memory intercomputer communication
US4562435A (en) * 1982-09-29 1985-12-31 Texas Instruments Incorporated Video display system using serial/parallel access memories
JPS5999520A (ja) * 1982-11-29 1984-06-08 Nec Corp プロセツサ間通信制御方式
JPS59111561A (ja) * 1982-12-17 1984-06-27 Hitachi Ltd 複合プロセツサ・システムのアクセス制御方式
JPS6289154A (ja) * 1985-10-16 1987-04-23 Mitsubishi Electric Corp 高速直列デ−タ伝送装置

Also Published As

Publication number Publication date
IN168469B (ko) 1991-04-06
EP0234182A1 (en) 1987-09-02
BR8700436A (pt) 1987-12-15
CN1010262B (zh) 1990-10-31
KR900009117B1 (ko) 1990-12-22
CN86108432A (zh) 1987-09-02
AR240764A1 (es) 1990-10-31
JPS62200448A (ja) 1987-09-04

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