KR20060045563A - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Abstract

As shown in FIG. 2A, the wiring pattern 2 is provided on the insulating tape 1, and one part is used as the connection part 4 for connection. 2B, insulating resin 7 is arrange | positioned so that the connection part 4 may be coat | covered. In FIG. 2C, the protruding electrode 6 of the semiconductor element 3 pushes out the insulating resin 7 and is aligned so as to be connected to the connecting portion 4, and is pressed in the D1 direction. As shown in FIG. 2D, the heating unit is heated in the pressurized state in the D1 direction, and the connecting portion 4 enters the protruding electrode 6, whereby the semiconductor element 3 and the wiring pattern 2 of the insulating tape 1 are connected. Thereby, the COF semiconductor device which improved the connection strength of a tape and a semiconductor element can be provided.

Insulation tape, wiring pattern, solder resist, protrusion electrode, insulating resin

Description

Semiconductor device and manufacturing method of semiconductor device {SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME}

1 is a plan view showing an insulating tape of a semiconductor device according to one embodiment of the present invention.

FIG. 2A is a cross-sectional view taken along a line A-A 'of the plan view shown in FIG. 1, FIG. 2B is a cross-sectional view of the semiconductor device showing a state different from that of FIG. 2A, and FIG. 2C is a cross-sectional view showing a state different from that of FIG. 2A. 2D is a cross-sectional view of the semiconductor device in a state different from that in FIG. 2A.

3 is an enlarged plan view of a portion of FIG. 1. FIG.

4A is a cross-sectional view showing one modification of the semiconductor device shown in FIGS. 2A to 2D, FIG. 4B is a cross-sectional view of the semiconductor device showing a state different from that of FIG. 4A, and FIG. 4C is still different from FIG. 4A. It is sectional drawing of the said semiconductor device which shows a state, FIG. 4D is sectional drawing of the said semiconductor device which shows another state from FIG. 4A, and FIG. 4E is sectional drawing of the said semiconductor device which shows another state from FIG. 4A.

Fig. 5 is a plan view showing an insulating tape of another modification of the semiconductor device.

FIG. 6A is a cross-sectional view taken along a line A-A 'of the plan view shown in FIG. 5, FIG. 6B is a cross-sectional view of the semiconductor device in a state different from that in FIG. 6A, and FIG. 6C shows a state different from FIG. 6A. It is sectional drawing, FIG. 6D is sectional drawing which shows another state from FIG. 6A.

FIG. 7 is a cross-sectional view along the line B-B 'of the semiconductor device. FIG.

8 is an enlarged plan view of a portion of FIG. 5.

9 is a cross-sectional view of a modification of the semiconductor device different from that of FIG. 7.

FIG. 10A is a cross-sectional view showing a modification of the semiconductor device shown in FIGS. 6A to 6D, FIG. 10B is a cross-sectional view of the semiconductor device showing a state different from that of FIG. 10A, and FIG. 10C is another state from FIG. 10A. It is sectional drawing which shows, and FIG. 10D is sectional drawing which shows another state.

FIG. 11A is a cross-sectional view showing an example of a conventional semiconductor device, FIG. 11B is a cross-sectional view of the semiconductor device showing a state different from that of FIG. 11A, FIG. 11C is a cross-sectional view showing a state different from FIG. 11A, and FIG. 11D. Is sectional drawing which shows another state from FIG. 11A, and FIG. 11E is sectional drawing which shows another state from FIG. 11A.

12 is a plan view illustrating an insulating tape of an example of a conventional semiconductor device.

FIG. 13A is a cross-sectional view showing another example of a conventional semiconductor device, FIG. 13B is a cross-sectional view of the semiconductor device showing a state different from that of FIG. 13A, and FIG. 13C is a cross-sectional view showing a different state from FIG. 13A. 13D is a cross-sectional view showing a state different from that in FIG. 13A.

FIG. 14A is a cross-sectional view showing still another example of a conventional semiconductor device, FIG. 14B is a cross-sectional view of the semiconductor device showing a state different from that of FIG. 14A, and FIG. 14C is a cross-sectional view showing a different state from FIG. 14A, FIG. 14D is a sectional view of another state of FIG. 14A.

<Explanation of symbols for main parts of drawing>

1: insulation tape

2, 2a: wiring pattern

3: semiconductor device

4, 4a, 4b: connection part

5: solder resist

6: protrusion electrode (bump)

7, 7a: insulating resin

8a: mounting area

8b: facing area

10, 10a, 10b, 10c, 10d: semiconductor device

14: electroconductive particle

[Patent Document 1] Japanese Unexamined Patent Publication No. 2001-176918 (Publication Date: June 29, 2001)

[Patent Document 2] Japanese Unexamined Patent Publication No. 60-262430 (published date: December 25, 1985)

[Patent Document 3] Japanese Unexamined Patent Publication No. 63-151033 (Publication Date: June 23, 1988)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly, to a semiconductor device and a method for manufacturing the semiconductor device, each of which is mounted on a flexible wiring board called a COF (Chip On Film) by bonding. It is about.

Conventionally, TCP (Tape Carrier Package) is known as an example of the semiconductor device which bonded and mounted the semiconductor element on the flexible wiring board. In TCP, the opening part which penetrates previously is formed in the part in which the semiconductor element is mounted in the insulating tape, and the front-end | tip part of a wiring pattern and a semiconductor element are joined in the state in which a wiring pattern protruded in a cantilever shape.

Recently, as another example of a semiconductor device in which a semiconductor element is bonded and mounted on a flexible wiring board, a chip on film (COF) (hereinafter simply referred to as COF) has been used. In COF, there is no mounting opening for mounting a semiconductor element, and the semiconductor element is bonded and mounted on the surface of the thin film insulating tape.

In COF, for example, a thin film insulating tape that can be bent freely is used as the flexible wiring board. Each wiring of the wiring pattern arranged on the surface of the thin film insulating tape and the corresponding terminal of the semiconductor element are electrically connected. Moreover, the connector part for external connection of a thin film insulating tape is connected to a liquid crystal panel, a printed board, etc. The wiring pattern exposed part of that excepting the above apply | coats a soldering resist, and ensures the insulation state.

At present, in consideration of the response to polyfinization, COF is supposed to be used. In order to cope with the demand for miniaturization and thinning, in COF thin film insulating tape, it is necessary to fine-tune the connection portion with the semiconductor element and the connector portion for external connection of the wiring pattern, and further thin the thin film insulating tape and the wiring pattern. There is. Here, in order to make the pitch of an inner lead small, it is necessary to make the width of an inner lead small and to make thickness thin.

Here, an example (conventional example 1) of the manufacturing method of the COF 31 is demonstrated based on FIGS. 11A-11E. In this manufacturing method, the joining by thermocompression bonding is used (refer patent document 1).

The wiring pattern 22 on the thin film insulating tape 21 side shown in FIG. 11A is a structure in which Au plating is provided on the basic Ni plating. The junction part 24 is provided in the wiring pattern 22, and the resist 25 is apply | coated with this junction part 24 exposed. As shown in FIG. 11B, the protruding electrode 26 of the semiconductor element 23 is aligned with respect to the junction portion 24 of the wiring pattern 22. The protruding electrode 26 is Au bumps.

As shown in FIG. 11C, the wiring pattern 22 of the semiconductor element 23 and the thin film insulating tape 21 is subjected to a high temperature of 400 to 450 ° C. and a pressure of 0.1 to 0.3 N / bump in the direction D6. , Heat squeezed. As a result, the protruding electrode 26 is bonded to the wiring pattern 22 so as to lie down. The joined part 32 becomes a diffusion layer or an alloy layer.

Thereafter, as shown in FIG. 11D, the underfill resin 27 flows from the nozzle 30 in the direction of the arrow D7 into the gap between the semiconductor element 23 and the thin film insulating tape 21 and is injected. As shown in FIG. 11E, the underfill resin 27 is thermally cured by heating as shown by arrow D8 to fix the semiconductor element 23 and the thin film insulating tape 21.

However, there are some problems in the joining method by such thermocompression bonding.

One of them is the point of using high temperature of 400 degreeC or more for joining. For this reason, the wiring pattern of a connection part produces a big expansion and contraction according to thermal expansion, heat shrink, and intake / exhaust / moisture. For this reason, connection defects are easy to generate | occur | produce by the cumulative dimension deviation of a connection part wiring pattern.

Also, the use of high loads is a problem. For this reason, the wiring pattern of a connection part becomes easy to deform | transform toward a semiconductor element from the outer side of the protrusion electrode of a semiconductor element. Therefore, defects due to contact with edge elements (edge touch) are likely to occur.

These problems become more remarkable when the fine pitch of a connection part and thinning of a wiring pattern which are one of the objectives of using COF as mentioned above are performed.

Here, as another example of the method for producing COF, conventionally known MBB (Micro Bump Bonding), NCP (Non Conductive Paste), ACP (Anisotropic Conductive Paste), which have been attracting attention recently, sealing method (hereinafter NCP, etc.) Is called).

These NCP etc. are a joining method at low temperature, and interposing insulating resin between the wiring pattern of a semiconductor element and an insulating tape (flexible wiring board), and forming the wiring pattern of the protrusion electrode of a semiconductor element, and a flexible wiring board, It is the joining method of resin-sealing together with a junction box. These are attracting attention as a technique effective for fine pitch formation, thin film formation, and the edge touch which arises by respond | corresponding to polyfinization.

For example, the said patent document 2, 3, etc. disclose the manufacturing method by MBB.

The manufacturing method (conventional example 2) described in patent document 2 is demonstrated based on FIG. 12, FIG. 13A-FIG. 13D. Here, sectional drawing in the C-C 'line cross section in the top view of FIG. 12 is FIGS. 13A-13D. In addition, below, the same code | symbol is attached | subjected to the member which has a function similar to the above-mentioned prior art example 1.

In the conventional example 2, first, the photocurable or thermosetting resin 27 is apply | coated and formed on the wiring pattern 22 of the wiring board (insulating tape) 21, as shown to FIG. 13A and 13B.

Next, as shown in FIG. 13C, the connecting electrodes 24 of the protruding electrodes 26 and the wiring patterns 22 are aligned and pressed in the direction of the arrow D9. This pressurizes and widens the resin 27 between the protruding electrode 26 and the wiring pattern 22 to flow the resin 27 in the direction of the arrow D10, thereby forming the projection electrode 26 and the wiring pattern 22. Electrical connection is obtained only by the pressure contact of the connection part 24. In addition, together with this, the resin 27 is protruded up to the periphery of the semiconductor element 23.

After that, as shown in FIG. 13D, the resin 27 is irradiated or heated in this state as shown by arrow D11, and cured by light or heat to thereby cure the semiconductor element 23 and the wiring board 21. Fix it. In the case of thermosetting, heating is performed at 150 degrees C or less.

Next, the manufacturing method (conventional example 3) described in patent document 3 is demonstrated based on FIG. 12, FIG. 14A-FIG. 14D. Also in this case, sectional drawing in the C-C 'line cross section in the top view of FIG. 12 corresponds to FIGS. 14A-14D.

In the conventional example 3, first, as shown in FIG. 14A and FIG. 14B, the thermosetting resin 7 is apply | coated and formed on the wiring pattern 22 of the wiring board 21. FIG.

Next, as illustrated in FIG. 14C, the protrusion electrodes 26 and the connection portions 24 of the wiring patterns 7 are aligned and brought into contact with each other, and the semiconductor elements 23 are connected using a pulse heating tool. It presses against the wiring board 21.

And as shown in FIG. 14D, after removing the resin 27 on the wiring pattern 22 to the periphery of a junction part, a pulse is carried out in the state which pressed the semiconductor element 23 to the wiring board 21 in the D12 direction. Apply current to the heating tool. Thereby, the semiconductor element 23 is heated to 100-250 degreeC, and the resin 27 is hardened. Thereby, while fixing the semiconductor element 23 to the wiring board 21, the projection electrode 26 and the wiring pattern 22 are electrically connected.

However, the above-described configuration of NCP and the like has a problem that a sufficient connection strength may not be obtained.

That is, NCP and the like have a problem in that connection strength (connection reliability) is low because the wiring pattern of the protruding electrode of the semiconductor element and the thin film insulating tape are connected only by contact by pressure and curing shrinkage of the resin.

For this reason, when it mounts, for example, in the use environment where low temperature and high temperature are repeated, there exists a possibility that peeling may generate | occur | produce in the interface of a thin film insulating tape and an insulating resin, or the interface of an insulating resin and a semiconductor element. This is because stress is generated in accordance with the difference in the coefficient of thermal expansion of the material being used when thermal expansion and contraction are repeated according to the temperature cycle. Moreover, even if it exposes to a high humidity environment after mounting and repeats moisture absorption and expansion, peeling may occur similarly. In this case, the electrical connection state between the wiring pattern of the thin film insulating tape and the protruding electrode of the semiconductor element deteriorates.

When the connection state deteriorates in this manner, the yield decreases, and as a result, the manufacturing cost increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide a semiconductor device and a method for manufacturing the semiconductor device, which can improve the connection reliability and the yield between the wiring electrode of the semiconductor element and the wiring pattern of the thin film insulating tape. It is in doing it.

The semiconductor device which concerns on this invention is a semiconductor provided with the semiconductor element containing the insulating tape in which the some wiring pattern was arrange | positioned, and the protrusion electrode electrically connected to the said insulating tape via the said wiring pattern, in order to achieve the said objective. In the apparatus, in the wiring pattern of the said insulating tape, in the area | region which opposes the projection electrode of the said semiconductor element, the connection part for making it enter the said projection electrode and connecting while deforming the projection electrode of the said semiconductor element is provided, The said Insulating resin is arrange | positioned between a semiconductor element and the said insulating tape, The said connection part in the wiring pattern of the said insulating tape pushes out the said insulating resin, and enters the projection electrode of the said semiconductor element, and is connected with the said projection electrode. It is characterized by.

In the semiconductor device of the above structure, a wiring pattern is arranged on the insulating tape, and the protruding electrode of the semiconductor element is connected to the wiring pattern. The insulating tape is a thin insulating tape. Insulating tape is provided with an external connection terminal, for example, and a wiring pattern is connected to this external connection terminal. By accessing the external connection terminal of an insulating tape, a semiconductor element can be accessed through a wiring pattern.

In the wiring pattern of the insulating tape, the protruding electrode of the semiconductor element is deformed and a connecting portion for connecting while entering the protruding electrode is provided. And insulating resin is arrange | positioned between a semiconductor element and an insulating tape. For example, insulating resin is apply | coated so that the connection part of an insulating tape may be coat | covered.

In this state, the semiconductor element and the insulating tape are connected under pressure. For example, the protrusion electrode of a semiconductor element is positioned with respect to the connection part of an insulating tape, and a pressure is applied to a semiconductor element. As a result, the connecting portion enters the protruding electrode while pushing the insulating resin between the protruding electrode and deforming the protruding electrode, and is connected to the protruding electrode.

According to the above configuration, since the connection between the wiring pattern and the protruding electrode is accompanied by not only contact by pressure but also deformation of the protruding electrode, the connection shape can be made complicated, thereby increasing the connection area and making the connection firm. Will be.

In addition, since the insulating resin is interposed between the semiconductor element and the insulating tape when connecting the wiring pattern and the protruding electrode, the semiconductor element and the insulating tape are in contact with each other at an undesired position other than the region where the protruding electrode and the connecting portion face each other. Can be prevented. Therefore, the defect by the edge touch can be prevented.

In addition, since it is not necessary to make it high temperature 400 degreeC or more at the time of joining, extra expansion and contraction does not generate | occur | produce in the wiring pattern of a connection part. For this reason, the cumulative dimension shift of a wiring pattern does not arise, and connection defect by this does not generate | occur | produce.

Therefore, the above-mentioned structure can solve the problem of the joining method by the thermocompression bonding and the joining method by low temperature, such as NCP simultaneously.

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention includes a semiconductor device including an insulating tape having a plurality of wiring patterns disposed thereon and a projection electrode electrically connected to the insulating tape via the wiring pattern. In the manufacturing method of a semiconductor device provided, a connecting portion for entering and connecting the projection electrode while deforming the projection electrode of the semiconductor element in a region of the wiring pattern of the insulating tape that faces the projection electrode of the semiconductor element. And a step of preparing an insulating resin between the semiconductor element and the insulating tape, and pushing the connecting portion in the wiring pattern of the insulating tape to push the insulating resin into the protruding electrode of the semiconductor element. Comprising a connecting step for connecting to the protruding electrode It characterized.

According to this manufacturing method, the semiconductor device described above can be manufactured, and the same effects as described above can be obtained. A COF semiconductor device can be manufactured using the manufacturing method of this semiconductor device. Moreover, a semiconductor module device can be manufactured using this COF semiconductor device.

Further objects, features, and excellent points of the present invention will be fully understood by the description below. Further advantages of the present invention will become apparent from the following description with reference to the accompanying drawings.

<Example>

EMBODIMENT OF THE INVENTION Below, one Embodiment of this invention is described in detail based on drawing.

EMBODIMENT OF THE INVENTION Embodiment of this invention is described below based on drawing.

The COF (Chip On Film, Semiconductor Device) 10 of the present embodiment includes a semiconductor element 3 on an insulating tape 1 as a film as shown in Fig. 2D, for example, and is bonded to each other. to be.

More specifically, the insulating tape 1 of the COF 10 is a structure in which the wiring pattern 2 is provided on the insulating tape 1 as a substrate as shown in FIGS. 2A to 2D.

The insulating tape 1 of this embodiment is a polyimide insulating tape. This insulating tape 1 has high flexibility and can be bent freely. The insulating tape 1 is a thin film which has a thickness of any one of 15, 20, 25, 38, 40 micrometers, etc., for example. Using this insulating tape 1 as a tape carrier of a base material, the wiring pattern 2 is provided in the tape surface. In addition, the opening for mounting the semiconductor element 3 is not provided in the insulating tape 1.

This wiring pattern 2 is a copper foil pattern, for example. Tin plating and gold plating which are not shown are given to the surface of a copper foil pattern. The wiring pattern 2 has the thickness of any one of 5, 8, 9, 12, 18 micrometers, etc. corresponding to the thickness of the insulating tape 1 and the pitch of a wiring pattern, for example.

As shown in FIG. 2A, in the wiring pattern 2, when the semiconductor element 3 is mounted, the region that faces the protruding electrode 6 and is connected to the protruding electrode 6 is connected to the connection portion 4. Shall be.

In the wiring pattern 2, the solder resist 5 is applied to the outside of the connecting portion 4. More specifically, the solder resist 5 not only avoids the connecting portion 4 for connection with the semiconductor element, but also for external connection not shown in the wiring pattern 2 on the insulating tape 1. The connector part is also applied to avoid. A liquid crystal panel, a printed board, and the like, which are not shown, are connected to this connector for external connection. This avoids unnecessary contact or other contact between the semiconductor element 3 and the wiring pattern 2, thereby ensuring a desired insulation state.

As shown in FIG. 2B, the insulating resin 7 is applied so as to cover the connection portion 4 of the wiring pattern 2.

As shown in FIG. 2C, the connecting electrodes 4 of the wiring pattern 2 are opposed to the protruding electrodes (bumps) 6 of the semiconductor element 3, and a pulse heating tool (not shown) is used for D1. In the direction of pressure. Here, a pulse heating tool heats in the state which applied the load at normal temperature, for example, and relaxes a load after completion | finish of heating. Arrow D1 represents heating in a pressurized state.

In this embodiment, the pressure is applied at a high load of 250 × 10 ⁻⁴ gf / µm ² or more as a target. The value of the load under this pressure varies depending on the width of the wiring pattern 2, the hardness of the protruding electrode 6, the viscosity of the insulating resin 7, the curing properties, and the like. For this reason, the specific value here is a target degree.

As shown in FIG. 2D, it heats about 230-250 degreeC in the pressurized state, and attaches and mounts the semiconductor element 3 on the surface of the insulating tape 1. As shown in FIG. Thereby, the projection electrode 6 of the semiconductor element 3 is electrically connected with the corresponding connection part 4 of the wiring pattern 2 arrange | positioned on the surface of the insulating tape 1. And the semiconductor element 3 is sealed by the thermosetting of the insulating resin 7. Thereafter, the temperature of the pulse heating tool is lowered to about room temperature, and then the pressure is released.

In addition, a constant heating tool may be used instead of the pulse heating tool. The constant heating tool is a manufacturing method which applies a load while heating with a tool heated at a constant temperature, and relaxes the load in the heated state. The constant heating tool is excellent in productivity.

Here, FIGS. 2A to 2D are cross-sectional views taken along the line A-A 'shown in FIG. 1, and as shown in FIG. 2D, in this embodiment, the projecting electrodes 6 and the wiring pattern 2 which are arranged to face each other and are joined are joined. ), The protruding electrode 6 side is mainly deformed. The protruding electrode 6 is pressed and crushed so that the wiring pattern 2 enters into the protruding electrode 6. At this time, the insulating resin 7 between the protruding electrode 6 and the wiring pattern 2 is pushed out and removed so as not to remain between the protruding electrode 6 and the wiring pattern 2. The insulating resin 7 is pushed out from below the semiconductor element 3 to form a fillet on the side surface of the semiconductor element 3.

As described above, in the COF 10 of the present embodiment, the insulating resin 7 is disposed between the insulating tape 1 and the semiconductor element 3, and the connecting portion is provided on the wiring pattern 2 of the insulating tape 1. (4) pushes out the insulating resin 7, enters the projection electrode 6 of the semiconductor element 3, and is the structure connected with the projection electrode 6. As shown in FIG.

Therefore, the projection electrode 6 is connected so as to deform, and the connection between the wiring pattern 2 and the projection electrode 6 can be strengthened. In addition, since the insulating resin 7 is interposed between the insulating tape 1 and the semiconductor element 3, the wiring pattern 2 of the insulating tape 1 and the semiconductor element 3 are disposed at an undesired position. Contact can be prevented. Moreover, since heating of about 230-250 degreeC is enough and it is not necessary to make it high temperature 400 degreeC or more, expansion and contraction of the wiring pattern 2 is small, and cumulative dimension shift is hard to generate | occur | produce.

By the above structure, the problem of the joining method by thermocompression bonding and the low temperature joining method, such as NCP by the prior art mentioned above, can be solved simultaneously. In addition, in the prior art such as Patent Document 2 and Patent Document 3 described above, the width of the wiring pattern, the intrusion of the wiring pattern into the protruding electrode, and the like are not particularly shown.

Here, the top view of the insulating tape 1 of the COF 10 is shown in FIG. As shown in FIG. 1, the soldering resist 5 is not apply | coated to the area | region (mounting area | region) 8a in which the semiconductor element 3 which is not shown in FIG. 1 is mounted. The connection part 4 is the part of the wiring pattern 2 of the insulating tape 1 contained in the area | region (opposite area) 8b which opposes the protrusion electrode 6 of the semiconductor element 3 which is not shown in figure. This connection part 4 is a shape where the width changes from the middle part. In more detail, the connection part 4 of the wiring pattern 2 has a shape in which the center side is narrower than the outer peripheral side in the semiconductor element 3.

In such a configuration, as shown in FIG. 2D, when the wiring pattern 2 enters the protruding electrode 6, the wiring pattern 2 is less than the case where the width of the wiring pattern 2 is constant, for example. Since the shape entering the projection electrode 6 is complicated, the connection can be made stronger.

In addition, in the insulating tape 1, since the wiring pattern 2 is arranged from the outer circumferential side of the region where the semiconductor element 3 is mounted toward the center side, the connecting portion 4 has a semiconductor with respect to the protruding electrode 6. It becomes a shape which positions toward the center side of the element 3.

In more detail, as shown in FIG. 3, the length X of the area | region where the width | variety of the wiring pattern 2 is tapered on the insulating tape 1 of the area | region of the protruding electrode 6 of the semiconductor element 3 is shown. It is preferable to set Y / 3 ≤ X ≤ 2Y / 3 with respect to the length Y. In this case, even when the position shift occurs when joining the protruding electrode 6 and the connecting portion 4 of the wiring pattern 2, the thin portion of the wiring pattern 2 is the protruding electrode of the semiconductor element 3. (6) can be easily touched. For example, if the length X is smaller than about 1/3 of the length Y, the above-described effect is small. In addition, when the length X is larger than about 2/3 of the length Y, the area into which the wide part of the wiring pattern 2 enters becomes small, and connection strength is reduced.

In addition, the COF 10 of this embodiment is manufactured using the joining technique by low temperature about 230-250 degreeC. For this reason, the expansion and contraction of the wiring pattern 2 containing the connection part 4 can be made small at the time of joining. Therefore, it is possible to reduce the occurrence of connection failure due to the cumulative dimension shift of the wiring pattern 2.

In addition, even if the wiring pattern 2 is deformed, for example, when the expansion and contraction occurs, since the insulating resin 7 is interposed between the wiring pattern 2 and the semiconductor element 3, the wiring pattern 2 and the semiconductor element. (3) The possibility of contact between the two can be made very small. Therefore, edge touch (poor contact) can be prevented.

Here, the COF by the conventional NCP etc. which were mentioned above are connected only by the contact by pressurization and the cure shrinkage of resin. For this reason, the connection reliability between the protruding electrode of a semiconductor element and the wiring pattern of an insulating tape is not so good.

On the other hand, according to the structure of the COF of this embodiment, since a comparatively strong connection can be ensured, compared with the conventional NCP etc., the wiring pattern 2 of the protrusion electrode 6 of the semiconductor element 3, and the insulating tape 1 is carried out. Connection reliability and yield can be improved to the extent of a conventional TCP arrangement.

Further, factors affecting the amount of expansion and contraction of the wiring pattern 2 include not only the temperature but also the width of the wiring pattern, the wiring pattern pitch, the space between the wiring patterns, the material of the insulating tape, the thickness, the moisture absorption amount, the presence or absence of preheating, There are many factors that affect the heating time, including preheating, and the like. For this reason, it is difficult to compare the conventional structure and the structure of a present Example using a numerical value.

[Modification 1]

Modifications of the above-described embodiment will be described. In the above-mentioned Example, although COF of manufacturing procedures, such as (pressurizing) heating and hardening after pressurization, was demonstrated, this application is not limited to this. As described below, the COF may be produced in a procedure such as pressurizing and expanding after expanding by heating. In addition, the structure of COF of this modification is the same as that of the Example mentioned above and manufacturing procedures. For example, the COF of this modification has the structure shown in FIG. For this reason, below, the same code | symbol is attached | subjected to the member and means which have the same function, and description is abbreviate | omitted.

First, as shown in FIG. 4A similar to FIG. 2A and FIG. 4B similar to FIG. 2B, the wiring pattern 2 is arrange | positioned on the insulating tape 1, the connection part 4 is provided, and the soldering resist 5 ) Is applied, and the insulating resin 7 is applied.

Next, in the present modification, as shown in FIG. 4C, the projecting electrode 6 of the semiconductor element 3 is connected to the connection portion 4 of the wiring pattern 2 in the state heated in the heating direction as indicated by the arrow D2. Face to and align the position. In this state, the insulating tape 1 and the wiring pattern 2 are thermally expanded as indicated by arrow D3, and the protruding electrode 6 and the wiring pattern 2 are aligned in the expanded position.

Subsequently, as shown in FIG. 4D, the semiconductor element 3 is heated while being pressed in the direction of the arrow D1. As a result, the protruding electrode 6 and the wiring pattern 2 are connected at the position where the insulating tape 1 is thermally expanded.

Moreover, the insulating resin 7 heat-hardens by advancing of heating.

Thereafter, as shown in Fig. 4E, cooling is performed at room temperature. Thereby, the heat shrink of the insulating tape 1 and the hardening shrinkage of the insulating resin 7 generate | occur | produce in the direction of arrow D4 and arrow D5, respectively. The wiring pattern 2 is the structure of the connection part 4 shown in FIG. 1, and this connection part 4 is connected so that it may enter into the opposing protrusion electrode 6. As shown in FIG. For this reason, in the COF 10a of this modification, a force is generated in the directions of arrows D4 and D5 shown in FIG. 4E, whereby the wiring pattern of the protruding electrode 6 of the semiconductor element 3 and the insulating tape 1 ( 2) is more firmly fixed (connected) at the connecting portion 4. That is, the shape of the connection part 4 is made to hang, and connection strength can be raised. Therefore, connection reliability and yield can be improved further.

[Modification 2]

Another modification will be described. In the above-mentioned embodiment, the shape of the wiring pattern 2 was a shape whose width was changed in the middle of the part which opposes the protrusion electrode 6 of the semiconductor element 3. In more detail, the width | variety of the wiring pattern 2 was a shape thinner at the center side than the outer peripheral side of a semiconductor element.

However, it is not limited to this. As shown in the present modification, the wiring pattern may be configured to be provided only up to the middle of the region facing the protruding electrode 6 of the semiconductor element 3. That is, the structure which arrange | positions the front-end | tip part of the wiring pattern 2 in the opposing area | region 8b may be sufficient as shown in FIG. Below, the member and means which have the same function as the above-mentioned embodiment are attached | subjected with the same code | symbol, and description is abbreviate | omitted.

As shown in FIG. 5, the insulating tape 1 of the COF 10b according to the present modification has a wiring pattern 2a on the insulating tape 1 between the protruding electrodes 6 of the corresponding semiconductor element 3. It is the structure which made distance between the front-end | tip facing longer than distance.

The procedure of manufacturing this COF 10b is demonstrated based on FIGS. 6A-6D.

First, as shown in FIG. 6A similar to FIG. 2A and FIG. 6B similar to FIG. 2B, the wiring pattern 2a of the said structure is arrange | positioned on the insulating tape 1, and the connection part 4a is provided, The soldering resist 5 is apply | coated and the insulating resin 7 is apply | coated.

As shown in FIG. 6C, the protruding electrode (bump) 6 of the semiconductor element 3 is opposed to the connecting portion 4a of the wiring pattern 2a by using a pulse heating tool (not shown). Pressurize in the direction of arrow D1.

As shown in FIG. 6D, the substrate is heated to about 230 to 250 ° C. in a pressurized state, and the semiconductor element 3 is bonded and mounted on the surface of the insulating tape 1. Thereby, the projection electrode 6 of the semiconductor element 3 is electrically connected with the corresponding connection part 4a of the wiring pattern 2a arrange | positioned on the surface of the insulating tape 1. As shown in FIG. And the semiconductor element 3 is sealed by the thermosetting of the insulating resin 7. Thereafter, the temperature of the pulse heating tool is lowered to the vicinity of room temperature, and then the pressure is released.

As shown in FIG. 7, in the section line B-B 'shown in FIG. 6D, the connecting portion 4a of the wiring pattern 2a enters the protruding electrode 6.

As described above, in the COF 10b of the present modified example, as shown in FIG. 5, the connecting portion 4a of the wiring pattern 2a on the insulating tape 1 is the protruding electrode 6 of the semiconductor element 3. It is a shape provided only to the middle of the area | region which opposes. In this shape, when the connecting portion 4a of the wiring pattern 2a enters the protruding electrode 6, a predetermined area is defined as the contact area between the connecting portion 4a of the wiring pattern 2a and the protruding electrode 6. It can be secured. For this reason, the connection between the connection part 4a of the wiring pattern 2a and the protrusion electrode 6 can be made into a predetermined firm connection.

Moreover, in the insulating tape 1, since the wiring pattern 2a is arrange | positioned toward the center side from the outer peripheral side of the area | region where the semiconductor element 3 is mounted, the connection part 4a is a semiconductor with respect to the projection electrode 6 It becomes a shape which positions toward the center side of the element 3.

More specifically, as shown in FIG. 8, the length of the portion of the semiconductor element 3 in which the connecting portion 4a of the wiring pattern 2a is not provided with respect to the length Z of the region of the protruding electrode 6. W is preferably about Z / 3? W? 2Z / 3. In this way, even when a position shift occurs when joining the protruding electrode 6 and the connecting portion 4a of the wiring pattern 2a, the distal end portion of the wiring pattern 2a is the protruding electrode of the semiconductor element 3 ( 6) can be contacted. For example, when the length W is smaller than about 1/3 of the length Z, the above-described effect is reduced. Moreover, when length W is larger than about 2/3 of length Z, the area in which the connection part 4a of the wiring pattern 2a enters becomes small, and connection strength decreases.

[Modification 3]

Another modification is described. This modification is a modification to the above-mentioned modification 2. In the above-mentioned embodiment, the case where the width | variety of the wiring pattern 2a is thinner than the part which opposes the protrusion electrode 6 of the semiconductor element 3 was demonstrated, but it is not limited to this.

That is, as shown in FIG. 9, the width | variety of the connection part 4c in a wiring pattern may be thicker than the part which opposes the protrusion electrode 6 of the semiconductor element 3. This FIG. 9 corresponds to the BB 'line cross section of FIG. 6D in the modification 2. As shown in FIG. In addition, below, the same code | symbol is attached | subjected to the member and means which have the same function as the above-mentioned embodiment, and description is abbreviate | omitted.

Thus, even if the width | variety of a wiring pattern is thick, since a wiring pattern is provided only to the middle of the area | region which opposes the protrusion electrode 6 of the semiconductor element 3, when a wiring pattern enters the protrusion electrode 6 The predetermined strength can be ensured as a connection state between the connection part 4c of the wiring pattern 2a and the projection electrode 6. Therefore, the connection between the wiring pattern and the projection electrode 6 can be made a predetermined firm connection.

That is, since the wiring pattern of the insulating tape is connected to the projection electrode leaving part of the semiconductor element center side of the projection electrode of the semiconductor element, or is pressed and connected, the width of the wiring pattern is larger than the width of the projection electrode. Even if the width of the wiring pattern is small, connection reliability equivalent to that obtained can be obtained.

Here, it may be difficult to finish narrow the width | variety of the wiring pattern of the insulating tape 1 here. For example, in the etching technique of an FPC (Flexible Printed Circuits) maker, since it is difficult to narrow the width of the wiring pattern of the insulating tape, it is conceivable that the width of the wiring pattern becomes larger than the width of the protruding electrode of the semiconductor element. have. In such a case, using the structure of this modification, COF which strengthened the connection can be obtained.

In the conventional TCP tape maker, there is no problem in that the width of the wiring pattern is reduced. On the other hand, since the conventional NCP etc. are connected only by the contact by pressure and the cure shrinkage of resin, when the width | variety of a wiring pattern is larger than the width | variety of a projection electrode, connection reliability will become lower.

[Modification 4]

Another modification is described. This modification is a modification to the above-mentioned modification 2. As shown in this modification, the electroconductive particle 14 may be disperse | distributed to the insulating resin 7a apply | coated between the semiconductor element 3 and the insulating tape 1. Below, the member and means which have the same function as the above-mentioned embodiment are attached | subjected with the same code | symbol, and description is abbreviate | omitted.

That is, as shown to FIG. 10A similar to FIG. 6A, the wiring pattern 2a is arrange | positioned on the insulating tape 1, the connection part 4a is provided, and the soldering resist 5 is apply | coated.

And as shown in FIG. 10B, the insulating resin 7a which disperse | distributed the conductive particle 14 is apply | coated. The material of the electroconductive particle 14 is not specifically limited. For example, as the electroconductive particle 14, gold coat resin particle, nickel particle, etc. can be used.

Then, as shown in FIG. 10C, the projection electrode (bump) 6 of the semiconductor element 3 is made to face the connection part 4a of the wiring pattern 2a, and an arrow is used using a pulse heating tool (not shown). Pressurize in the direction D1. As shown in FIG. 10D, the substrate is heated to about 230 to 250 ° C. in a pressurized state, and the semiconductor element 3 is bonded and mounted on the surface of the insulating tape 1. Thereby, the projection electrode 6 of the semiconductor element 3 is electrically connected with the corresponding connection part 4a of the wiring pattern 2a arrange | positioned on the surface of the insulating tape 1. As shown in FIG. And the semiconductor element 3 is sealed by the thermosetting of the insulating resin 7. Thereafter, the temperature of the pulse heating tool is lowered to the vicinity of room temperature, and then the pressure is released.

As described above, the semiconductor device according to the present invention includes a semiconductor device including an insulating tape on which a plurality of wiring patterns are arranged and a protrusion electrode electrically connected to the insulating tape via the wiring pattern. In the wiring pattern of the said insulating tape, in the area | region which opposes the projection electrode of the said semiconductor element, the connection part which enters and connects to the said projection electrode, and is connected while deforming the projection electrode of the said semiconductor element is provided, Insulating resin is arrange | positioned between the said insulating tapes, The said connection part in the wiring pattern of the said insulating tape pushes out the said insulating resin, and enters the protrusion electrode of the said semiconductor element, It is connected with the said projection electrode, It is characterized by the above-mentioned. do.

Moreover, in the said structure, the wiring pattern of the said insulating tape may be the structure arrange | positioned toward the center side from the outer peripheral side of the area | region where the said semiconductor element is mounted.

The semiconductor device according to the present invention is characterized in that, in the above configuration, the shape of the connection portion of the wiring pattern is different from the shape of portions other than the connection portion adjacent to the connection portion of the wiring pattern.

Thus, if the shape of a connection part differs from the shape of the part adjoining a connection part, when a connection part enters a projection electrode and is connected, it uses a connection part as a latching part, and firmly joins between a connection part and a projection electrode. I can do it.

On the other hand, if the shape of the connecting portion is the same as the portion adjacent to the connecting portion, it cannot be caught between the connecting portion and the protruding electrode. For this reason, strength cannot be improved by that much.

The semiconductor device according to the present invention is characterized in that in the above configuration, the side of the wiring pattern includes a portion of the connection portion that is not parallel to the direction in which the wiring pattern extends.

In this way, when the connection portion includes sides that are not parallel in the direction in which the wiring pattern extends, when the connection portion enters the protruding electrode and is connected, the connection portion is used as a locking portion to firmly join the connection portion and the protruding electrode. It can be done.

On the other hand, if the shape of the connecting portion is the same as the portion adjacent to the connecting portion, it cannot be caught between the connecting portion and the protruding electrode.

In addition, the shape of the side of the said wiring part in the said connection part of the said wiring pattern can also be described as the structure which has the independent direction parallel to the part which divided the side, at least two or more.

In the semiconductor device according to the present invention, in the above configuration, the connection portion of the wiring pattern is formed so that the width of the wiring pattern is at least partially thinned.

Thus, the width | variety of some wiring patterns can be narrowed and narrowed, and a connection part can be used as a locking part, and the connection between a connection part and a protrusion electrode can be made strong.

In the semiconductor device according to the present invention, in the above configuration, the connection portion of the wiring pattern is formed such that the width of the wiring pattern is thinner at the center side than the outer peripheral side of the region where the semiconductor element is mounted.

In this manner, the width of the wiring pattern may be made thinner at the center side than at the outer peripheral side of the region where the semiconductor element is mounted. Thereby, using a connection part as a latching part, joining between a connection part and a protrusion electrode can be made strong.

Moreover, the semiconductor device mentioned above can also be expressed as follows. That is, it is a semiconductor device provided with the insulating tape of the thin film which has arrange | positioned the wiring pattern in multiple numbers, and the semiconductor element electrically connected with the said wiring pattern, Comprising: An insulating resin is interposed between the said semiconductor element and the said insulating tape, In a semiconductor device in which a projection electrode and a wiring pattern of the insulating tape are connected, the width of the wiring pattern of the insulating tape connected to the projection electrode of the semiconductor element is a portion of the semiconductor element at the middle of the projection electrode of the semiconductor element. The wiring pattern of the insulating tape is formed in the above-described shape of the wiring pattern when the insulating resin is cured while connecting the wiring electrode of the semiconductor element and the wiring pattern of the insulating tape and being cured at the center side rather than the outer peripheral side. Or, by width, enters the protruding electrode of the semiconductor element, or crushes it by pressing a part It may be expressed as COF semiconductor device of the connected configuration.

In the semiconductor device according to the present invention, in the above configuration, the connection portion is a ratio of the length of the portion where the width of the wiring pattern is tapered to the length of the wiring pattern over a region facing the protruding electrode of the semiconductor element. It is characterized by being 1/3 or more and 2/3 or less.

With such a configuration, even when a positional shift occurs when joining the connection portion between the projection electrode and the wiring pattern, the narrow width portion of the wiring pattern can be easily brought into contact with the projection electrode of the semiconductor element. For example, when the above-mentioned ratio is smaller than about 1/3, the case where a thin width | variety becomes outside of a projection electrode by position shift can also be considered, and the effect obtained becomes small. In addition, when the above-mentioned ratio is larger than about 2/3, the area where the wide portion of the wiring pattern enters the protruding electrode is small, and the connection strength is reduced.

Moreover, the said structure can also be expressed as the structure whose length which the width | variety of the wiring pattern of the said insulating tape is thin is about 1/3 to 2/3 of the length of the protruding electrode of the said semiconductor element.

The semiconductor device according to the present invention is characterized in that, in the above configuration, the connection portion of the wiring pattern has a shape in which the wiring pattern extends only until the middle of the region of the semiconductor element facing the protruding electrode.

Thus, you may arrange | position so that the area | region containing the front end of a wiring pattern may be included in the area | region which opposes the protrusion electrode of a semiconductor element. Even in such a configuration, the connecting portion can be used as the locking portion, and the connection between the connecting portion and the protruding electrode can be made firm.

In the above-described configuration, the semiconductor device according to the present invention, in the insulating tape, arranges the wiring pattern from the outer circumferential side of the region on which the semiconductor element is mounted to the center side, and the wiring pattern at the connecting portion faces. The distal end portion in the direction is configured such that the distance between the distal ends of the wiring patterns facing each other is longer than the distance between the corresponding protruding electrodes of the semiconductor element.

With such a configuration, the wiring pattern of the insulating tape enters the protruding electrode leaving a part of the semiconductor element center side of the protruding electrode of the semiconductor element. In this way, since each connection part is arrange | positioned toward the center side from the outer periphery of a semiconductor element, joining can be made stronger.

Moreover, the semiconductor device mentioned above can also be expressed as follows. That is, it is a semiconductor device provided with the insulating tape of the thin film which has arrange | positioned the wiring pattern in multiple numbers, and the semiconductor element electrically connected with the said wiring pattern, Comprising: An insulating resin is interposed between the said semiconductor element and the said insulating tape, In a semiconductor device in which a projection electrode and a wiring pattern of the insulating tape are connected, the distance between the tip of the wiring pattern of the insulating tape facing each other is longer than the distance between the projection electrodes of the corresponding semiconductor element and the projection electrode of the semiconductor element. When the insulating resin is cured while connecting the wiring pattern of the insulating tape, the wiring pattern of the insulating tape enters the protruding electrode leaving a part of the semiconductor element center side of the protruding electrode of the semiconductor element, or It can be expressed as a COF semiconductor device characterized by being pressed and connected. There is also.

In the semiconductor device according to the present invention, in the above configuration, the connection portion has a ratio of the length of the portion where the wiring pattern extends to the length of the wiring pattern over an area facing the protruding electrode of the semiconductor element, It is characterized by being 1/3 or more and 2/3 or less.

With such a configuration, even when a positional shift occurs when joining the connection portion between the projection electrode and the wiring pattern, the tip portion of the wiring pattern can be brought into contact with the projection electrode of the semiconductor element. For example, when the above-mentioned ratio is larger than about 2/3, the case where the tip part becomes the outer side of a projection electrode by position shift can also be considered, and the effect obtained can become small. In addition, when the above-described ratio is smaller than about 1/3, the area where the wide portion of the wiring pattern enters the protruding electrode is small, and the connection strength is reduced.

Moreover, the length which the wiring pattern of the said insulating tape enters into the protrusion electrode of the said semiconductor element, or presses and connects the said structure is about 1/3-2/3 of the length of the protrusion electrode of the said semiconductor element. It can also be described as a composition.

In the semiconductor device according to the present invention, in the above configuration, the wiring pattern of the insulating tape is characterized in that the width at the wide portion is smaller than the width of the protruding electrode of the semiconductor element.

Thus, if the width | variety in the part with wide wiring pattern is a structure smaller than the width | variety of the protrusion electrode of a semiconductor element, when it does not make it different, for example, when the shape of a wiring pattern differs from another part in a connection part, In comparison, the connection area between the wiring pattern and the protruding electrode can be increased. Thereby, joining strength can be improved.

Moreover, the said structure can also be expressed as the structure whose width | variety of the part with a large wiring pattern of the said insulating tape is smaller than the width | variety of the protrusion electrode of the said semiconductor element. Moreover, the said structure can also be expressed as the structure whose width | variety of the wiring pattern of the said insulating tape of the side connected with the protruding electrode of the said semiconductor element is smaller than the width | variety of the protrusion electrode of the said semiconductor element.

In the semiconductor device according to the present invention, in the above configuration, the wiring pattern of the insulating tape is characterized in that the width in the wide portion is equal to or wider than the width of the protruding electrode of the semiconductor element.

With such a configuration, even if the width of the wiring pattern is wider than the width of the protruding electrode, the configuration according to the present invention can be applied.

Here, when arranging a wiring pattern on an insulating tape, in some cases, the width of the wiring pattern may not be sufficiently thin. According to the said structure, even in such a case, the structure which concerns on this invention can be applied and a joining strength can be improved.

Moreover, the said structure can also be expressed as the structure whose width | variety of the wiring pattern of the said insulating tape is large, or is the same as the width of the protrusion electrode of the said semiconductor element, or is large. Moreover, the said structure can also be expressed as the width | variety of the wiring pattern of the said insulating tape of the side connected with the protruding electrode of the said semiconductor element being the same as or larger than the width | variety of the protruding electrode of the said semiconductor element.

The semiconductor device which concerns on this invention is characterized by the said insulating resin containing electroconductive particle in the said structure.

The electrical connection between the projection electrode of the semiconductor element and the connection portion of the wiring pattern can be made more reliable. Moreover, the said structure can also be expressed as a structure which disperse | distributes electroconductive particle in the said insulating resin previously.

The semiconductor device manufacturing method which concerns on this invention is a semiconductor provided with the semiconductor element containing the insulating tape in which the some wiring pattern was arrange | positioned, and the protrusion electrode electrically connected with the said insulating tape via the said wiring pattern as mentioned above. In the manufacturing method of the apparatus, in the wiring pattern of the said insulating tape, in the area | region which opposes the projection electrode of the said semiconductor element, providing the connection part for entering and connecting to the said projection electrode, deforming the projection electrode of the said semiconductor element, and And a step of preparing an insulating resin between the semiconductor element and the insulating tape, and the connecting portion in the wiring pattern of the insulating tape pushes out the insulating resin and enters the protruding electrode of the semiconductor element. And a connecting step for connecting the electrode. .

The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above configuration, the connecting step is performed in a state in which the insulating tape is thermally expanded by heating.

With such a configuration, after the insulating resin is cured by heat and cooled to room temperature, the connection part of the projection electrode of the semiconductor element and the wiring pattern of the insulating tape is more firmly fixed by heat shrink of the insulating tape and curing shrinkage of the insulating resin. (Connection) is possible.

In addition, in the method for manufacturing a semiconductor device having the above-described configuration, the insulating tape is used for heating when an insulating resin is interposed between the semiconductor element and the insulating tape and the projection electrode of the semiconductor element is connected to the wiring pattern of the insulating tape. The insulating resin is heated and cured, and after cooling to room temperature, the projection of the semiconductor element is formed by thermal shrinkage of the insulating tape and curing shrinkage of the insulating resin. It can also be expressed as a manufacturing method of the COF semiconductor device of the structure by which the connection part between an electrode and the wiring pattern of the said insulating tape is fixed | fixed more firmly.

As mentioned above, when connecting the projection electrode of a semiconductor element and the wiring pattern of an insulation tape, and hardening insulating resin, the wiring pattern of an insulation tape is made into the projection electrode of a semiconductor element by said shape and width of a wiring pattern. It is connected by being pressed or pressed in part, so that a relatively strong connection can be secured. For this reason, compared with the conventional NCP etc., the connection reliability and yield between the protrusion electrode of a semiconductor element and the wiring pattern of an insulating tape can be improved about the conventional TCP arrangement | positioning.

Moreover, the COF connected and sealed as mentioned above is equipped with the insulating tape of the thin film which has arrange | positioned the wiring pattern in multiple numbers, and the semiconductor element electrically connected with the said wiring pattern, and insulating resin is provided between the said semiconductor element and the said insulating tape. The semiconductor device which connected the protrusion electrode of the said semiconductor element and the wiring pattern of the said insulating tape through this. And this semiconductor device is characterized by having the structure of a-(c) below, in order to improve the connection reliability and the yield between the projection electrode of the said semiconductor element, and the wiring pattern of the said thin film insulating tape.

(a) Regardless of the material of the projection electrode of the semiconductor element, the wiring pattern of the insulating tape, and the plating specification, the width of the wiring pattern of the insulating tape connected to the projection electrode of the semiconductor element is the projection electrode of the semiconductor element. In the middle portion (about 1/3 to 2/3 of the length of the protruding electrode), it is thinner at the center side than the outer peripheral side of the semiconductor element, and connects the protruding electrode of the semiconductor element and the wiring pattern of the insulating tape. And the wiring pattern of the insulating tape enters into the protruding electrode of the semiconductor element or presses a part of the wiring pattern of the insulating pattern when the insulating resin is cured.

(b) The distance between the front ends of the wiring patterns of the insulating tape is longer than the distance between the corresponding projecting electrodes of the semiconductor element, and the wiring patterns of the insulating electrode and the insulating tape are connected to each other. When the resin is cured, the wiring pattern of the insulating tape enters the protruding electrode leaving a part (about 1/3 to 2/3 of the length of the protruding electrode) of the semiconductor element center side of the protruding electrode of the semiconductor element, Or pressed to crush.

(c) When the insulating resin is interposed between the semiconductor element and the insulating tape, and the projection electrode of the semiconductor element is connected to the wiring pattern of the insulating tape, the insulating tape is in a position of thermal expansion by heating. The insulating resin is heated and cured, and after cooling to room temperature, the wiring pattern of the protruding electrode of the semiconductor element and the insulating tape is formed by thermal shrinkage of the insulating tape and curing shrinkage of the insulating resin. The structure in which the joint of the liver is more firmly fixed (connected).

According to the above-described configuration, the width of the wiring pattern of the insulating tape connected to the protrusion electrode of the semiconductor element is independent of the material of the protrusion electrode of the semiconductor element, the wiring pattern of the insulating tape, and the plating specification. In the middle portion (about 1/3 to 2/3 of the length of the protruding electrode) of the protruding electrode of the semiconductor element, it is tapered at the center side rather than the outer peripheral side of the semiconductor element, and the protruding electrode of the semiconductor element and the insulating tape When the insulating resin is cured while the wiring pattern is connected, the wiring pattern of the insulating tape enters the protruding electrode of the semiconductor element, or is pressed by a portion with the above-described shape and width of the wiring pattern. The distance between the ends of being connected and the wiring patterns of the insulating tape face each other is smaller than the distance between the corresponding protruding electrodes of the semiconductor element. In addition, when connecting the projection electrode of the said semiconductor element and the wiring pattern of the said insulation tape, and hardening the said insulating resin, the wiring pattern of the said insulation tape is a part of the semiconductor element center side of the projection electrode of the said semiconductor element ( (1/3 to 2/3 of the length of the protruding electrode) is entered into the protruding electrode, or pressed and crushed to connect, interposing an insulating resin between the semiconductor element and the insulating tape, and the protruding portion of the semiconductor element When connecting the wiring pattern of an electrode and the said insulating tape, while connecting the said insulating tape in the position of the state thermally expanded by heating, heat-hardening the said insulating resin, and after cooling to normal temperature, the said insulating tape By the heat shrink of the insulating resin and the curing shrinkage of the insulating resin, the protrusion electrode of the semiconductor element and the insulating tape By more firmly fixing (connecting) the connection portion between the line patterns, the connection reliability and yield between the projection electrode of the semiconductor element and the wiring pattern of the thin film insulating tape can be improved to the extent of the conventional TCP arrangement.

As described above, in the semiconductor device according to the present invention, a connection portion for entering and connecting the projection electrode while deforming the projection electrode of the semiconductor element in a region of the wiring pattern of the insulating tape facing the projection electrode of the semiconductor element. The insulating resin is disposed between the semiconductor element and the insulating tape, and the connecting portion in the wiring pattern of the insulating tape pushes out the insulating resin and enters the protruding electrode of the semiconductor element. It is a structure connected with the said projection electrode.

With such a configuration, the bonding strength between the connecting portion of the wiring pattern and the protruding electrode of the semiconductor element can be increased.

For example, in this structure, the shape of the connection part of a wiring pattern differs from an adjacent position, and the side of a wiring pattern includes the part which is not parallel in the direction to which a wiring pattern extends. For example, the connection portion of the wiring pattern is made thinner at least in part, and the width of the wiring pattern is made narrower at the center side than at the outer peripheral side of the region where the semiconductor element is mounted. Also, for example, the connecting portion includes the tip portion of the wiring pattern. In this way, the effect can be enhanced.

Since the semiconductor device which concerns on this invention can improve connection reliability and a yield, it can produce at low cost and can use it as a semiconductor device for mass production.

The specific embodiments or examples described above are intended to clarify the technical contents of the present invention to the last, and the present invention should not be construed in consultation with only such specific embodiments, but within the scope shown in the claims. Modifications are possible and embodiments obtained by appropriately combining the embodiments, the modified forms, and the technical means disclosed in the respective modifications are also included in the technical scope of the present invention.

Claims (16)

An insulating tape on which a plurality of wiring patterns are arranged; A semiconductor device comprising a projection electrode electrically connected to the insulating tape through the wiring pattern; An insulating resin disposed between the semiconductor element and the insulating tape; It is provided in the area | region which opposes the protrusion electrode of the said semiconductor element in the wiring pattern of the said insulating tape, enters and connects to the said projection electrode, deforming the protrusion electrode of the said semiconductor element, and pushes out the said insulating resin, and said semiconductor Connection portion which enters into the protruding electrode of the element and is connected to the protruding electrode A semiconductor device comprising a. The method of claim 1, The shape of the said connection part of the said wiring pattern is a semiconductor device different from the shape of parts other than the said connection part adjacent to the said connection part of the said wiring pattern. The method of claim 1, A side of the wiring pattern includes a portion of the connection portion that is not parallel to the direction in which the wiring pattern extends. The method of claim 1, The connection part of the said wiring pattern is formed so that the width | variety of the said wiring pattern may become thin at least one part. The semiconductor device characterized by the above-mentioned. The method of claim 1, The connection part of the said wiring pattern is formed so that the width | variety of the said wiring pattern may become thinner at the center side than the outer peripheral side of the area | region where the said semiconductor element is mounted. The method of claim 5, The said connection part is a ratio of the length of the part which the width | variety of the said wiring pattern narrowed with respect to the length of the said wiring pattern over the area | region which opposes the protruding electrode of the said semiconductor element is 1/3 or more and 2/3 or less A semiconductor device. The method of claim 1, The connecting portion of the wiring pattern has a shape in which the wiring pattern extends only until the middle of the region facing the protruding electrode of the semiconductor element. The method of claim 7, wherein In the insulating tape, the wiring pattern is arranged from the outer circumferential side of the region where the semiconductor element is mounted toward the center side. A distal end portion in a direction in which the wiring pattern faces in the connecting portion has a distance between the distal ends of the wiring patterns facing each other longer than a distance between the corresponding protruding electrodes of the semiconductor element. The method of claim 8, The said connection part is a ratio of the length of the part which the said wiring pattern extends with respect to the length of the said wiring pattern over the area | region which opposes the protruding electrode of the said semiconductor element is 1/3 to 2/3 or less, It is characterized by the above-mentioned. A semiconductor device. The method of claim 1, The wiring pattern of the said insulating tape is a semiconductor device characterized by the width | variety in a wide part being smaller than the width | variety of the protrusion electrode of the said semiconductor element. The method of claim 1, The wiring pattern of the said insulating tape is a semiconductor device characterized by the width | variety in the wide part being the same as, or wider than the width | variety of the protrusion electrode of the said semiconductor element. The method of claim 1, The said insulating resin contains electroconductive particle, The semiconductor device characterized by the above-mentioned. The method of claim 1, The connecting device and the protruding electrode are connected to each other by heat shrinkage of the insulating tape and curing shrinkage of the insulating resin. A manufacturing method of a semiconductor device comprising a semiconductor element comprising an insulating tape on which a plurality of wiring patterns are arranged and a projection electrode electrically connected to the insulating tape via the wiring pattern, In the wiring pattern of the said insulating tape, in the area | region which opposes the projection electrode of the said semiconductor element, the connection part which enters and connects to the said projection electrode, and is connected while deforming the projection electrode of the said semiconductor element is provided, A preparatory step of disposing an insulating resin between the insulating tapes; A connecting step of connecting the connecting portion in the wiring pattern of the insulating tape to push the insulating resin into the protrusion electrode of the semiconductor element and to connect the protrusion electrode; The manufacturing method of the semiconductor device containing the. The method of claim 14, The connecting step is performed in a state in which the insulating tape is thermally expanded by heating. The method of claim 15, In the connecting step, after the insulating tape is heated to be connected, it is cooled to room temperature, and the connection part is firmly fixed by heat shrink of the insulating tape and curing shrinkage of the insulating resin. Way.

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