KR20000011282A - 반도체장치및그제조방법 - Google Patents
반도체장치및그제조방법 Download PDFInfo
- Publication number
- KR20000011282A KR20000011282A KR1019990021295A KR19990021295A KR20000011282A KR 20000011282 A KR20000011282 A KR 20000011282A KR 1019990021295 A KR1019990021295 A KR 1019990021295A KR 19990021295 A KR19990021295 A KR 19990021295A KR 20000011282 A KR20000011282 A KR 20000011282A
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- South Korea
- Prior art keywords
- semiconductor element
- connection
- land
- electrode formation
- substrate
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 116
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims description 14
- 238000005304 joining Methods 0.000 claims description 11
- 239000000945 filler Substances 0.000 claims description 8
- 238000010292 electrical insulation Methods 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 3
- 238000009434 installation Methods 0.000 abstract description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 12
- 239000011889 copper foil Substances 0.000 description 12
- 238000007747 plating Methods 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 241000039077 Copula Species 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229920000265 Polyparaphenylene Polymers 0.000 description 1
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 125000001495 ethyl group Chemical group [H]C([H])([H])C([H])([H])* 0.000 description 1
- 239000006023 eutectic alloy Substances 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- -1 polyphenylene Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
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- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (5)
- 반도체 소자의 전극 형성면에, 상기 반도체 소자의 평면 영역 내에 설치되는 외부 접속 단자와 동일한 배치로, 반도체 소자의 탑재면에 이반하는 외면이 외부 접속 단자를 접합하는 접속 구멍의 저부가 되는 랜드를 형성한 접속 기판을, 상기 전극 형성면에 형성한 전극과 상기 랜드를 전기적으로 접속시켜 접합한 반도체 장치로서,상기 반도체 소자의 전극 형성면에, 상기 랜드의 위치에 각각 대응하여 랜드보다도 작은 직경의 접속 패드를 설치함과 동시에, 상기 접속 패드와 상기 전극을 전기적으로 접속하는 배선 패턴을 설치하고,상기 접속 패드와 상기 반도체 소자의 탑재면에서 접속 패드에 대향하는 랜드를 범프를 통하여 전기적으로 접속하고, 또 상기 접속 기판의 접속 구멍에 노출하는 랜드에 외부 접속 단자를 접합한 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 접속 기판이, 전기적 절연성을 갖는 수지재로 되는 기체에 랜드를 형성하고, 반도체 소자의 탑재면의 랜드 표면에 상기 범프를 접합하는 상기 랜드보다도 작은 직경의 접합부를 설치하고, 반도체 소자의 탑재면에 이반하는 외면에 상기 접속 구멍을 형성한 것인 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 반도체 소자와 상기 접속 기판 사이의 간극 부분에 하부 충전재를 충전한 것을 특징으로 하는 반도체 장치.
- 전기적 절연성을 갖는 기체에 반도체 소자의 평면 영역 내에 설치되는 외부 접속 단자와 동일한 배치로 반도체 소자의 탑재면에 이반하는 외면이 외부 접속 단자를 접합하는 접속 구멍의 저부가 되는 랜드를 형성한 접속 기판과,상기 랜드의 위치에 각각 대응하여 랜드보다도 작은 직경의 접속 패드가 설치되고, 상기 접속 패드와 상기 반도체 소자의 전극 형성면의 전극을 전기적으로 접속하는 배선 패턴이 전극 형성면에 설치된 반도체 소자를 위치 맞춤하고,상기 접속 패드와 상기 반도체 소자의 탑재면에서 접속 패드에 대향하는 랜드를 범프를 통하여 전기적으로 접속하고,상기 접속 기판의 접속 구멍에 노출하는 랜드에 외부 접속 단자를 접합하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제 4항에 있어서,상기 접속 패드와 상기 랜드를 범프를 통하여 전기적으로 접속한 후, 상기 반도체 소자와 상기 접속 기판 사이의 간극 부분에 하부 충전재를 충전하는 것을 특징으로 하는 반도체 장치의 제조 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP98-190468 | 1998-07-06 | ||
JP10190468A JP2000022039A (ja) | 1998-07-06 | 1998-07-06 | 半導体装置及びその製造方法 |
Publications (1)
Publication Number | Publication Date |
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KR20000011282A true KR20000011282A (ko) | 2000-02-25 |
Family
ID=16258627
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019990021295A Ceased KR20000011282A (ko) | 1998-07-06 | 1999-06-09 | 반도체장치및그제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US6256207B1 (ko) |
EP (1) | EP0971406A3 (ko) |
JP (1) | JP2000022039A (ko) |
KR (1) | KR20000011282A (ko) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3339838B2 (ja) * | 1999-06-07 | 2002-10-28 | ローム株式会社 | 半導体装置およびその製造方法 |
JP3842548B2 (ja) * | 2000-12-12 | 2006-11-08 | 富士通株式会社 | 半導体装置の製造方法及び半導体装置 |
US6529022B2 (en) * | 2000-12-15 | 2003-03-04 | Eaglestone Pareners I, Llc | Wafer testing interposer for a conventional package |
US20020098620A1 (en) * | 2001-01-24 | 2002-07-25 | Yi-Chuan Ding | Chip scale package and manufacturing method thereof |
US7122404B2 (en) * | 2003-03-11 | 2006-10-17 | Micron Technology, Inc. | Techniques for packaging a multiple device component |
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DE3248385A1 (de) * | 1982-12-28 | 1984-06-28 | GAO Gesellschaft für Automation und Organisation mbH, 8000 München | Ausweiskarte mit integriertem schaltkreis |
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JPH09115964A (ja) * | 1995-10-18 | 1997-05-02 | Toshiba Corp | 半導体装置及びその製造方法 |
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KR100274333B1 (ko) * | 1996-01-19 | 2001-01-15 | 모기 쥰이찌 | 도체층부착 이방성 도전시트 및 이를 사용한 배선기판 |
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US5818697A (en) * | 1997-03-21 | 1998-10-06 | International Business Machines Corporation | Flexible thin film ball grid array containing solder mask |
US6075710A (en) * | 1998-02-11 | 2000-06-13 | Express Packaging Systems, Inc. | Low-cost surface-mount compatible land-grid array (LGA) chip scale package (CSP) for packaging solder-bumped flip chips |
US6054772A (en) * | 1998-04-29 | 2000-04-25 | National Semiconductor Corporation | Chip sized package |
-
1998
- 1998-07-06 JP JP10190468A patent/JP2000022039A/ja active Pending
-
1999
- 1999-06-09 KR KR1019990021295A patent/KR20000011282A/ko not_active Ceased
- 1999-07-06 US US09/347,909 patent/US6256207B1/en not_active Expired - Fee Related
- 1999-07-06 EP EP99305365A patent/EP0971406A3/en not_active Withdrawn
Also Published As
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JP2000022039A (ja) | 2000-01-21 |
EP0971406A3 (en) | 2001-03-07 |
US6256207B1 (en) | 2001-07-03 |
EP0971406A2 (en) | 2000-01-12 |
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