KR19990048092A - Manufacturing method of liquid crystal display device - Google Patents

Abstract

The present invention discloses a method for manufacturing a liquid crystal display device having reduced manufacturing process steps.

According to the present invention, the method includes forming a gate electrode wiring by a first photolithography process on an insulating substrate having a pad for transmitting an electrical signal at an edge thereof, a gate insulating film on the insulating substrate on which the gate electrode wiring is formed, Sequentially stacking an amorphous silicon layer and an insulating film for a channel, patterning the insulating film by a predetermined portion by a second photolithography process to form an etch stopper, and removing a predetermined portion of the amorphous silicon layer and the gate insulating film. Etching by a photolithography process to open the pad, and depositing the doped semiconductor layer and the transparent conductive material on the etch stopper-formed product, wherein the doped semiconductor layer and the transparent conductive material are Contact with an exposed pad. The method may further include forming a pixel electrode integral with the source electrode and the drain electrode by partially etching the transparent conductive material and the doped semiconductor layer through a fourth photolithography process.

Description

Manufacturing method of liquid crystal display device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display element, and more particularly, to a method for manufacturing a liquid crystal display element using a thin film transistor as a switching element.

Generally, in the liquid crystal display element, the active matrix liquid crystal display element has a high speed response and has a large number of pixels. As a result, the display screen has high characteristics such as high image quality, large size, and color screen, and is used in portable TVs, notebook PCs, automobile navigation systems, and the like.

In such an active matrix liquid crystal display device, a switching element such as a diode or a thin film transistor is disposed at a point where a gate line and a data line intersect to selectively turn on / off a pixel electrode.

A conventional method of manufacturing a liquid crystal display device including the thin film transistor will be described with reference to FIG. 1.

First, as illustrated in FIG. 1, a metal layer (not shown) having excellent conductive characteristics such as aluminum, for example, aluminum, is deposited on the surface of the insulating substrate 1 to a predetermined thickness. Then, the metal film is patterned through the first photolithography process to form the gate electrode wiring 2. Subsequently, the gate insulating film 3 is deposited on the insulating substrate 1 including the gate electrode wiring 2 to a predetermined thickness, and the amorphous silicon layer 4 serving as a channel of the thin film transistor is sequentially deposited. Subsequently, in order to prevent the loss of the amorphous silicon layer 4 during the subsequent etching process on the amorphous silicon layer 4, the silicon nitride film for the etch stopper is deposited, and then the silicon nitride film is formed through a second photolithography process. By partial etching, the etch stopper 5 is formed. Then, the ohmic layer 6 doped with impurities is deposited on the amorphous silicon layer 3 including the etch stopper 5. Thereafter, the ohmic layer 6 and the amorphous silicon layer 4 doped with impurities are patterned to exist in the predetermined region of the thin film transistor through a third photolithography process. Thereafter, an ITO film for pixel electrodes is deposited on the resultant to a predetermined thickness, and then patterned through a fourth photolithography process to form the pixel electrode 7. Subsequently, although not shown in the drawings, the gate insulating film is etched through the fifth photolithography process so that the pad (region to be connected to a conductive line to be formed later) formed on the insulating substrate 1 is opened, thereby forming a contact hole (not shown). Not formed). Subsequently, a metal film for data electrode wiring is formed to a predetermined thickness on the resultant. At this time, the metal film is in contact with the pad exposed through the contact hole and in contact with the pixel electrode 7. Thereafter, the metal film is partially etched through the sixth photolithography process to connect the source electrode 8a, the amorphous silicon 4, and the pixel electrode 7 integrated with the data electrode wiring (not shown). (8b) is formed. Thus, the thin film transistor is completed. Finally, an insulating film is coated on the resultant, and the protective film 9 is formed by etching the thin film transistor to cover the thin film transistor through a seventh photolithography process.

However, the liquid crystal display device including the conventional thin film transistor has to undergo at least seven photolithography processes, thereby increasing manufacturing time.

In addition, due to the use of multiple masks, there is also a problem that the manufacturing cost is also increased.

Accordingly, the present invention is to solve the above-mentioned conventional problems, the present invention, the manufacturing of a liquid crystal display device that can significantly reduce the photolithography process, manufacturing time and cost in manufacturing a liquid crystal display device The purpose is to provide a method.

1 is a cross-sectional view of a liquid crystal display device formed by a conventional seventh photo etching process.

2A to 2D are cross-sectional views of respective manufacturing processes for explaining a method of manufacturing a liquid crystal display device according to the present invention.

(Explanation of symbols for the main parts of the drawing)

11: insulated substrate 12: gate electrode wiring

13 gate insulating film 14 amorphous silicon layer

15: etch stopper 16: doped ohmic layer

17a: source electrode 17b: pixel electrode

18: protective film

In order to achieve the above object of the present invention, the present invention, the step of forming a gate electrode wiring in the first photolithography process on the upper side of the insulating substrate having a pad for transmitting an electrical signal, the gate electrode wiring Sequentially depositing a gate insulating film, an amorphous silicon layer for a channel, and an insulating film on the formed insulating substrate, and forming an etch stopper by partially patterning the insulating film by a second photolithography process; Etching a predetermined portion of the silicon layer and the gate insulating film by a third photolithography process to open a pad, and depositing a doped semiconductor layer and a transparent conductive material on the resultant on which the etch stopper is formed, The doped semiconductor layer and the transparent conductive material are in contact with the exposed pad. The method may further include forming a pixel electrode integral with the source electrode and the drain electrode by partially etching the transparent conductive material and the doped semiconductor layer through a fourth photolithography process.

According to the present invention, by forming the thin film transistor and the pixel electrode in only four photolithography processes, the process step and the process time are reduced.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views of respective manufacturing processes for explaining a method of manufacturing a liquid crystal display device according to the present invention.

First, as shown in FIG. 2A, a metal film for a gate electrode is deposited to a predetermined thickness on an insulating substrate 11, for example, on a transparent glass substrate. Subsequently, a photoresist film is applied on the first photolithography process, that is, on the metal film, and then exposed and developed using a mask for limiting the gate electrode wiring to form a photoresist pattern (not shown). A series of processes of etching the metal film in the form of a resist pattern are performed to form the gate electrode wiring 12.

Thereafter, referring to FIG. 2B, the gate insulating film 13 and the channel amorphous silicon film 14 are sequentially stacked on the insulating substrate 11 on which the gate electrode wiring 12 is formed. In this case, the gate insulating film 13 may be a silicon nitride film having excellent film quality and good insulating properties, or a laminated film of a silicon oxide film and a silicon nitride film may be used. In addition, when the amorphous silicon film 14 is used as the channel layer, there is an advantage that the off current is excellent. Subsequently, a silicon nitride film is deposited on the amorphous silicon film 14 at an etching rate different from that of the amorphous silicon film, and excellent in moisture protection. Subsequently, the etch stopper 15 is formed by etching through the second photolithography process so that the silicon nitride film exists only in a predetermined portion of the amorphous silicon film 14. At this time, in the process of forming the etch stopper 15, a method using a known back exposure may be used.

Here, pads (not shown) for electrically supplying signals from the printed circuit board (not shown) to the gate electrode wiring 12 and the data electrode wiring to be formed later are formed at the edge of the surface of the insulating substrate 11. Formed. However, since the gate electrode wiring 12 is formed on the surface of the insulating substrate 11, a separate pad opening step is not necessary. However, the pad for data electrode wiring to be formed later is buried by the gate insulating film 12. Therefore, in order to transmit external electrical signals to the data electrode wiring, a process of opening the pad for data electrode wiring is necessary. Therefore, a predetermined portion of the gate insulating film and the amorphous silicon layer is etched by the third photolithography process so that the pad for data electrode wiring can be opened.

As illustrated in FIG. 2C, an ohmic layer serving as an ohmic function between the metal film and the silicon layer on the resultant of the insulating substrate 11 having the etch stopper 15 formed thereon, and the doped semiconductor layer containing N-type impurities ( 16). Then, the material for data electrode wiring, that is, the source and drain electrode of the thin film transistor is deposited on the doped semiconductor layer 16. In the present invention, an indium tin oxide (ITO) material is formed as a material for the source and drain electrodes so that the source, drain and pixel electrodes can be formed simultaneously in order to reduce the process steps. Thereafter, the deposited ITO material is etched through a fourth photolithography process so that a predetermined portion of the etch stopper 15 is exposed, and a thin film transistor region and a pixel region are defined, and the source electrode 17a and the drain electrode are etched. An integral pixel electrode 17b is formed.

Thereafter, as shown in FIG. 2D, a protective film 18 is formed on the resultant to complete the thin film transistor.

The present invention is not limited only to the above embodiment.

In the present invention, a third photolithography process for opening the pad is formed between the step of forming the etch stopper 15 and the step of forming the doped semiconductor layer 16, but the doped semiconductor layer 16 is formed. It may be carried out between the step and the step of depositing the ITO material.

As described in detail above, according to the present invention, a first photolithography process for forming a gate electrode wiring, a second photolithography process for forming an etch stopper, a third photolithography process for opening a pad, and a thin film transistor The thin film transistor is formed only by a fourth photolithography process for simultaneously forming a source, a drain electrode, and a pixel electrode of the ITO material.

As such, by forming the thin film transistor using only four photolithography processes, the manufacturing step and the manufacturing process time are reduced.

In addition, since the thin film transistor is formed using only four masks, the manufacturing cost is also reduced.

In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.

Claims (4)

Forming a gate electrode wiring by a first photolithography process on an insulating substrate having a pad for transmitting electrical signals at an edge thereof; Sequentially stacking a gate insulating film, an amorphous silicon layer for a channel, and an insulating film on an insulating substrate on which the gate electrode wiring is formed; Forming a etch stopper by partially patterning the insulating layer by a second photolithography process; Etching a predetermined portion of the amorphous silicon layer and the gate insulating layer by a third photolithography process to open a pad; Depositing a doped semiconductor layer and a transparent conductive material over the resulting etch stopper, the doped semiconductor layer and the transparent conductive material contacting the exposed pad; And partially etching the transparent conductive material and the doped semiconductor layer through a fourth photolithography process to form a pixel electrode integral with the source electrode and the drain electrode. The method of claim 1, wherein the etch stopper is made of a silicon nitride film. The method of claim 1, wherein the transparent conductive material is indium tin oxide (ITO). The liquid crystal display of claim 1, further comprising, after forming the pixel electrode integral with the source electrode and the drain electrode, depositing a passivation layer on the resultant of the insulating substrate. Manufacturing method.