KR101023045B1 - 멀티증착층을 구비한 윈도우 및 그 제조방법 - Google Patents
멀티증착층을 구비한 윈도우 및 그 제조방법 Download PDFInfo
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- KR101023045B1 KR101023045B1 KR1020080115089A KR20080115089A KR101023045B1 KR 101023045 B1 KR101023045 B1 KR 101023045B1 KR 1020080115089 A KR1020080115089 A KR 1020080115089A KR 20080115089 A KR20080115089 A KR 20080115089A KR 101023045 B1 KR101023045 B1 KR 101023045B1
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- deposition
- layer
- thin film
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- titanium dioxide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Computer Hardware Design (AREA)
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- Power Engineering (AREA)
- Laminated Bodies (AREA)
Abstract
Description
타입 |
신뢰성(테스트 항목) | 기타사항 |
||||
X-커팅 | 고온고습 | 열충격 | 자외선 | 염수염분 | ||
A | ○ | ○ | × | ○ | × | 얼룩/찐 발생 심각 |
B | ○ | ○ | ○ | ○ | ○ |
Claims (10)
- 기판과;상기 기판 상에 형성된 일산화규소(SiO)박막과 상기 일산화규소(SiO)박막 상에 이산화티타늄(TiO2)박막 및 이산화규소(SiO2)박막을 적어도 하나 포함하는 멀티증착층; 및상기 멀티증착층을 보호하기 위한 증착 보호층을 포함하는 것을 특징으로 하는 멀티증착층을 구비한 윈도우.
- 제 1항에 있어서,상기 이산화티타늄(TiO2)박막은이산화티타늄 증착후 표면 계면을 활성화시켜 이산화규소(SiO2)와의 밀착력을 향상시키기 위한 에칭 처리된 것을 특징으로 하는 멀티증착층을 구비한 윈도우.
- 제 1항에 있어서,상기 증착 보호층은카본(Carbon), 불소화합물(Fluoro compound)을 포함하여 구성된 것을 특징으로 하는 멀티증착층을 구비한 윈도우.
- 제 3항에 있어서,상기 카본은 60 ~ 90 중량부, 불소화합물은 10 ~ 40 중량부를 포함하는 것을 특징으로 하는 멀티증착층을 구비한 윈도우.
- 기판 상에 진공증착에 의해 멀티코팅층을 형성하는 단계를 포함하는 윈도우 제조 방법에 있어서,일산화규소(SiO)를 기판 상에 진공증착하여 일산화규소 박막을 형성하는 단계와:상기 일산화규소 박막 상에 이산화티타늄(TiO2)과 이산화규소(SiO2)을 적어도 한번 진공증착하여 멀티증착층을 형성하는 단계와;상기 멀티코팅층 상에 진공증착에 의해 증착 보호층을 형성하는 단계를 포함하는 것을 특징으로 하는 윈도우 제조방법.
- 삭제
- 제 5항에 있어서,상기 이산화티타늄 박막 형성 후 계면을 활성화 시켜 밀착력을 향상하기 위해 에칭 처리하는 단계를 더 포함하는 것을 특징으로 하는 윈도우 제조 방법.
- 제 5항에 있어서,상기 보호층 형성단계는카본과 불소화합물을 혼합하는 단계와;상기 혼합된 결과물을 상기 멀티 증착층 상에 진공증착하는 단계를 포함하는 것을 특징으로 하는 윈도우 제조 방법.
- 제 8항에 있어서,상기 혼합된 결과물은상기 카본은 60 ~ 90 중량부, 불소화합물은 10 ~ 40 중량부를 포함하는 것을 특징으로 하는 윈도우 제조 방법.
- 제 9항에 있어서,상기 불소화합물은Si(n)H(2n+1)F ~ Si(n)F(2n+2) 구조인 것을 특징으로 하는 윈도우 제조 방법.
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KR1020080115089A KR101023045B1 (ko) | 2008-11-19 | 2008-11-19 | 멀티증착층을 구비한 윈도우 및 그 제조방법 |
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KR1020080115089A KR101023045B1 (ko) | 2008-11-19 | 2008-11-19 | 멀티증착층을 구비한 윈도우 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
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KR20100056100A KR20100056100A (ko) | 2010-05-27 |
KR101023045B1 true KR101023045B1 (ko) | 2011-03-24 |
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KR1020080115089A KR101023045B1 (ko) | 2008-11-19 | 2008-11-19 | 멀티증착층을 구비한 윈도우 및 그 제조방법 |
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KR102171240B1 (ko) * | 2014-03-18 | 2020-10-29 | 삼성디스플레이 주식회사 | 표시장치 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002372798A (ja) * | 2001-06-15 | 2002-12-26 | Kyocera Corp | 画像形成装置 |
KR20060112054A (ko) * | 2005-04-26 | 2006-10-31 | (주)썬텔 | 키패드 제조방법 |
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2002372798A (ja) * | 2001-06-15 | 2002-12-26 | Kyocera Corp | 画像形成装置 |
KR20060112054A (ko) * | 2005-04-26 | 2006-10-31 | (주)썬텔 | 키패드 제조방법 |
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