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JPS6481259A - Semiconductor plastic package - Google Patents

Semiconductor plastic package

Info

Publication number
JPS6481259A
JPS6481259A JP23722487A JP23722487A JPS6481259A JP S6481259 A JPS6481259 A JP S6481259A JP 23722487 A JP23722487 A JP 23722487A JP 23722487 A JP23722487 A JP 23722487A JP S6481259 A JPS6481259 A JP S6481259A
Authority
JP
Japan
Prior art keywords
lead
frame
header
lead frame
inner lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23722487A
Other languages
Japanese (ja)
Inventor
Sadao Yoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Eastern Japan Semiconductor Inc
Original Assignee
Hitachi Tokyo Electronics Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Tokyo Electronics Co Ltd, Hitachi Ltd filed Critical Hitachi Tokyo Electronics Co Ltd
Priority to JP23722487A priority Critical patent/JPS6481259A/en
Publication of JPS6481259A publication Critical patent/JPS6481259A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent a defect due to a short circuit between a header and a lead frame and to prevent a detect due to a short circuit between the lead frame and a lead by a method wherein an insulating film is formed from the rear to the side of an inner lead part of the lead frame. CONSTITUTION:A lead frame 2 is caulked (fixed) onto a header (a heat- dissipating plate) 1 by using a rivet 3. An inner lead part 4, a dam 5, an outer lead part 6 and a frame 7 are provided at the lead frame 2. An end part of the frame 7 is caulked onto the header 1. A tip part of the inner lead part 4 is covered with an insulating film 8 from its rear to its side. The tip part of the inner lead part 4 and an electrode of a semiconductor element (a chip) which has been fixed to a tab part 9 on the header 1 by using a brazing material such as a solder or the like are wirebonded by using a wire 11 for connector use.
JP23722487A 1987-09-24 1987-09-24 Semiconductor plastic package Pending JPS6481259A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23722487A JPS6481259A (en) 1987-09-24 1987-09-24 Semiconductor plastic package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23722487A JPS6481259A (en) 1987-09-24 1987-09-24 Semiconductor plastic package

Publications (1)

Publication Number Publication Date
JPS6481259A true JPS6481259A (en) 1989-03-27

Family

ID=17012218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23722487A Pending JPS6481259A (en) 1987-09-24 1987-09-24 Semiconductor plastic package

Country Status (1)

Country Link
JP (1) JPS6481259A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012033665A (en) * 2010-07-30 2012-02-16 On Semiconductor Trading Ltd Semiconductor device and manufacturing method of the same
JPWO2022224340A1 (en) * 2021-04-20 2022-10-27

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012033665A (en) * 2010-07-30 2012-02-16 On Semiconductor Trading Ltd Semiconductor device and manufacturing method of the same
JPWO2022224340A1 (en) * 2021-04-20 2022-10-27

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