JPS646612Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a circuit for efficiently processing synchronization signals in a digital television receiver.

[Conventional technology]

In a digital television receiver, a received composite color television signal is first converted from an analog signal to a digital signal (hereinafter referred to as A/D conversion) and quantized. During A/D conversion, the range between the maximum and minimum values that the signal level can take is divided at appropriate quantization intervals. The greater the number of divisions, the higher the accuracy, but at the expense of the required number of bits, the number of required circuit components increases, making it more complex and increasing costs. For example, if the data is divided into 256 from 0 to 255, the required number of bits will be 8 bits. A/
When designing a D-conversion circuit, it is important not only to make do with the minimum number of bits, but also to cover the widest possible signal effective range or dynamic range with the same number of bits. The prior art related to this will be described below.

FIG. 3 shows an example of a composite color television signal during one horizontal scanning period of a television receiver. In the figure, S is a horizontal synchronizing signal and is designed to be positioned exactly in the middle of the horizontal retrace period T3. During the horizontal retrace period, the horizontal scanning beam of the picture tube is 1
It is a period of rapid transition from the end of one horizontal line to the start of the next. The waveform between adjacent horizontal retrace periods T3 represents a video signal, which is a luminance signal Y and a chrominance signal C superimposed thereon. The period between the synchronization signal S and the start point of the video signal in the horizontal retrace period T3 is called a back porch, and a burst signal (color subcarrier signal) is carried here. The color signal is obtained by phase-modulating this color subcarrier signal with three primary color signals (color signal C is partially shown in FIG. 3 for convenience of explanation). After the signal shown in Figure 3 continues for the number of scanning lines of one screen, a vertical blanking period is provided at the end of the last scanning line, and the presence of a vertical synchronizing signal in the middle of this vertical blanking period indicates that Same as synchronization signal. In this way, a composite color television signal is constructed.

The minimum signal level of the luminance signal Y is the back porch level (indicated by PL). This is called the pedestal level. On the other hand, the chrominance signal has a portion below the pedestal level. Therefore, in order to quantize a composite color television signal, it is necessary to include the level range including the portion below the pedestal level. The signal thus A/D converted is separated into the chrominance signal and the luminance signal by a digital circuit called a Y/C separation circuit. However, since the separated luminance signal does not contain the component below the pedestal level, the quantized portion below the pedestal level is wasted. As a result, the effective range of the digital value representing the luminance signal is narrowed, which causes a drawback such as overflow when processing such as contour enhancement is performed.

[Problem to be solved]

SUMMARY OF THE INVENTION An object of the present invention is to provide a synchronization signal compression/separation circuit that can easily eliminate the drawbacks of the prior art described above.

[Means for solving problems]

The sync signal compression/separation circuit according to the present invention is used in digital television as a Y/C separation circuit that separates a composite color television signal into a luminance signal and a chrominance signal after A/D conversion, and After applying various signal processing such as contour enhancement, scanning line conversion, etc. to the output from the circuit that fixes the synchronization signal to a single level for the luminance signal and the circuit that fixes this synchronization signal to a single level, or and a sync separation circuit that extracts the sync signal fixed to the single level during signal processing.

[Effect]

The output of the A/D conversion circuit includes the entire range from the maximum value of the video signal to the synchronization signal (R1 in FIG. 3). Therefore, the digital signal range of the luminance signal after Y/C separation is also R1, but as mentioned above, the portion below the pedestal level PL uses some bits, but this is an unnecessary portion. Therefore, with the configuration of the present invention, the synchronization signal is compressed and fixed to a single level. As this single level
LSB (least significant bit) is preferred.

By assigning and fixing a single level to the synchronization signal as described above, the effective range of the luminance signal is expanded.

The synchronization signal fixedly assigned to a single level is extracted by detecting the single level in the synchronization separation circuit after subsequent signal processing such as contour enlargement and processing such as scanning line conversion. and is supplied to the picture tube. This synchronization separation can be performed even during the various signal processing described above.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a circuit diagram of one embodiment of a synchronization signal compression/separation circuit according to the present invention. 1 represents an input terminal to which a composite color television signal in analog form is supplied;
The signal is quantized to 256 levels up to 255, outputted as an 8-bit digital signal, and supplied to the Y/C separation circuit 3. The Y/C separation circuit 3 separates the digitized composite color television signal into a color signal C and a luminance signal Y using a well-known technique.
The color signal C is processed by the following signal processing circuit 5 and scanning conversion circuit 7.
The signal is sent to the matrix circuit 10 via the . The signal processing circuit 5 and the scanning line conversion circuit are each constructed using conventional techniques.

The luminance signal Y output from the Y/C separation circuit 3 is input to the synchronous compression level shift circuit 4. The synchronization compression level shift circuit 4 has a function of allocating the zero level out of 256 levels to the synchronization signal included in the luminance signal Y, and effectively utilizing the remaining 255 levels only with the luminance signal. That is, among the 8-bit digital signals, "00000000" is used as a synchronization signal, and "00000001" to "11111111" are all changed to the effective range of the luminance signal. Such a circuit 4 will be described later using an embodiment.

The output of the synchronous compression level shift circuit 4 is supplied to a signal processing circuit 6 that performs various signal processing such as horizontal and vertical edge enhancement. The output of the signal processing circuit 6 is input to a scanning line conversion circuit 8, where the number of scanning lines is converted.

The output of the scanning line conversion circuit 8 is sent to the matrix circuit 10.
At the same time, it is supplied to the synchronization separation circuit 9. The matrix circuit 10 uses digital R, G, B signals based on the luminance signal Y and the color signal C according to the prior art.
Output a signal. These R, G, and B signals are converted into analog signals by a digital-to-analog (D/A) converter 11 and then supplied to a picture tube 12.

On the other hand, the synchronization separation circuit 9 extracts a zero-level synchronization signal from the input signal and supplies it to the picture tube 12. Such a circuit can be easily realized using a gate circuit.

FIG. 2 is a circuit diagram showing one embodiment of the synchronization signal compression level shift circuit 4. As shown in FIG.

In the figure, a terminal 40 is an input terminal for the luminance signal Y from the Y/C separation circuit 3. This signal is, for example, 8 bits.

The input terminal 40 is connected to each input of a level shift circuit 41 and a low pass filter (hereinafter referred to as LPF) 43. The level shift circuit 41 shifts (shifts) the luminance signal in the LSB direction by an amount corresponding to the amplitude of the synchronization signal, and then sends it to the limiter 42 . The limiter 42 outputs signals from the level shift circuit 41 from 1 to the maximum level (in the case of 8 bits).
Signal values outside the range up to 255) are limited above and below to values within that range. For example, zero is forced to 1. As a result, the pedestal level becomes 1. In this way, the 8-bit “00000001” ~
The luminance signal contained between "11111111" is output from the limiter 42 and sent to the synchronous synthesis circuit 46.

On the other hand, the LPF 43 suppresses small noise signals included in the input luminance signal, and then sends this signal to the comparator 45.
Output to. The output of the reference level generator 44 is supplied as another input to the comparator 45. This reference level generator 44 slices the synchronization signal at an appropriate level (for example, the intermediate level of the synchronization signal), and uses this level as a reference level for the comparator 45.
give to The comparator 45 outputs logic “1” when the output from the LPF 43 is lower than the reference level.
In other cases, logic "0" is output to the respective synchronous synthesis circuits 46.

The synchronous synthesis circuit 46 outputs a zero signal ("00000000") to the output terminal 47 when the input from the comparator 45 is logic "1", and when the input from the comparator 45 is logic "0" The output signal of the limiter 42 is transferred to the output terminal 47 as it is.

In the embodiment shown in FIG. 1, the synchronization separation circuit 9 is connected after the signal processing circuit 6 and the scanning line conversion circuit 8, but it is not necessarily limited to this. The extraction of the synchronization signal expressed by the above zero signal is
Since it can be easily implemented using a NAND gate, etc., it can be effectively and easily implemented when a synchronization signal is required in the process of signal processing, for example, when resetting a memory.

〔effect〕

With the synchronization signal compression/separation circuit according to the present invention,
Since the effective range of the digital luminance signal in a digital television receiver is expanded and there is more room in the register, overflow of the register will not occur when signal processing such as edge enhancement is performed, and the quality of the screen will be improved.

Since the synchronization signal is fixed at a single quantization level, this quantization level, for example, zero level, can be easily extracted using a gate or the like, so that the synchronization signal can be easily extracted and used where necessary. Therefore, flexibility in circuit design is improved.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a detailed circuit diagram of an embodiment of a portion of the circuit shown in FIG. 1, and FIG. 3 is an explanatory diagram of a composite color television signal. 1...Composite color television input terminal, 2...
...A/D converter, 3...Y/C separation circuit, 4...
Circuit that fixes the synchronization signal to a single level, 6, 8...
...Various signal processing circuits, 9...Synchronization separation circuit.

Claims (1)

[Claims for Utility Model Registration] 1. In digital television, a Y/C separation circuit that separates a composite color television signal into a luminance signal and a color signal after A/D conversion;
A circuit that inputs the luminance signal from the Y/C separation circuit and fixes the synchronization signal to a single level, and outputs from the circuit that fixes the synchronization signal to a single level, outputs various signals such as edge enhancement and scanning line conversion. A synchronization signal compression and separation circuit comprising: a synchronization separation circuit that extracts the synchronization signal fixed to the single level after processing or during the signal processing. 2. The circuit for fixing the synchronization signal to a single level assigns a quantization level from 1 to a maximum quantization level to the effective range of the luminance signal, and assigns a quantization level of zero to the synchronization signal. A synchronizing signal compression/separation circuit according to claim 1 of the utility model registration claim.