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JPS6455855A - Complementary type field effect transistor - Google Patents

Complementary type field effect transistor

Info

Publication number
JPS6455855A
JPS6455855A JP62213306A JP21330687A JPS6455855A JP S6455855 A JPS6455855 A JP S6455855A JP 62213306 A JP62213306 A JP 62213306A JP 21330687 A JP21330687 A JP 21330687A JP S6455855 A JPS6455855 A JP S6455855A
Authority
JP
Japan
Prior art keywords
oxide film
layer
mask
film spacer
ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62213306A
Other languages
Japanese (ja)
Inventor
Atsushi Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62213306A priority Critical patent/JPS6455855A/en
Publication of JPS6455855A publication Critical patent/JPS6455855A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the driving capability of drain currents by forming an LDD structure using an oxide film as a mask in an NMOS, and forming a full gate structure wherein the oxide film is not used as a mask in a PMOS but an impurity diffusion layer is diffused right below a gate electrode. CONSTITUTION:Spacers 14a aud 14b, consisting of silicon oxide films which cover the slant surfaces of trapezoidal gate electrodes 11a and 11b, are formed. By ion-implanting an Ntype impurity such as using the Oxide film spacer 14a as a mask, an N<+> layer 15 of high concentration is formed. By this operation, an LDD structure wherein the N<+> layer 15 and an N<-> layer 12 have an offset area where respective diffusion areas are offset by the thickness of the oxide film spacer 14a. Then an impurity such as boron is ion-implanted to form a P<+> layer 16 within a substrate 1. At this point, the oxide film spacer 14b does not serve as a mask with respect to a boron ion, and therefore, the P<+> layer 16 is formed in such a way as pinching the gate electrode 11b from both sides as well as extending under the oxide film spacer 14b, whereby a so-called full gate type PMOS structure is formed.
JP62213306A 1987-08-27 1987-08-27 Complementary type field effect transistor Pending JPS6455855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62213306A JPS6455855A (en) 1987-08-27 1987-08-27 Complementary type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62213306A JPS6455855A (en) 1987-08-27 1987-08-27 Complementary type field effect transistor

Publications (1)

Publication Number Publication Date
JPS6455855A true JPS6455855A (en) 1989-03-02

Family

ID=16636946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62213306A Pending JPS6455855A (en) 1987-08-27 1987-08-27 Complementary type field effect transistor

Country Status (1)

Country Link
JP (1) JPS6455855A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296401A (en) * 1990-01-11 1994-03-22 Mitsubishi Denki Kabushiki Kaisha MIS device having p channel MOS device and n channel MOS device with LDD structure and manufacturing method thereof
US5432367A (en) * 1991-04-17 1995-07-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having sidewall insulating film

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134057A (en) * 1984-12-05 1986-06-21 Oki Electric Ind Co Ltd Cmos type ic device
JPS61177769A (en) * 1985-02-01 1986-08-09 Hitachi Ltd Semiconductor device and manufacture thereof
JPS634667A (en) * 1986-06-25 1988-01-09 Hitachi Ltd Method for manufacturing semiconductor integrated circuit device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134057A (en) * 1984-12-05 1986-06-21 Oki Electric Ind Co Ltd Cmos type ic device
JPS61177769A (en) * 1985-02-01 1986-08-09 Hitachi Ltd Semiconductor device and manufacture thereof
JPS634667A (en) * 1986-06-25 1988-01-09 Hitachi Ltd Method for manufacturing semiconductor integrated circuit device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296401A (en) * 1990-01-11 1994-03-22 Mitsubishi Denki Kabushiki Kaisha MIS device having p channel MOS device and n channel MOS device with LDD structure and manufacturing method thereof
US5432367A (en) * 1991-04-17 1995-07-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having sidewall insulating film
US5541127A (en) * 1991-04-17 1996-07-30 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of sidewall insulating film

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