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JPS5678157A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5678157A
JPS5678157A JP15459879A JP15459879A JPS5678157A JP S5678157 A JPS5678157 A JP S5678157A JP 15459879 A JP15459879 A JP 15459879A JP 15459879 A JP15459879 A JP 15459879A JP S5678157 A JPS5678157 A JP S5678157A
Authority
JP
Japan
Prior art keywords
region
fets
type
contact
wirings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15459879A
Other languages
Japanese (ja)
Other versions
JPS6331106B2 (en
Inventor
Hiroyuki Tango
Tai Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15459879A priority Critical patent/JPS5678157A/en
Publication of JPS5678157A publication Critical patent/JPS5678157A/en
Publication of JPS6331106B2 publication Critical patent/JPS6331106B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To increase an integration without using wirings for connecting two FETs by a method wherein when p and n channel MOSFETs are formed on an insulating substrate, drain regions respectively constituting them are formed in contact with each other. CONSTITUTION:A thick field insulating film 21 is formed around an insulating substrate 20 made of supphire or to like, and an n<-> type channel region 22 of the p channel MOSFET, and p<++> type source region 24 and p+ type drain region 25 between which the region 22 is inserted are formed in an 1/2 region on the surface of the substrate 20 surrounded by the film 21. In this case, impurity concentrations of the drain regions 25 and 26 of the two FETs are made less than 10<18> pieces/cm<2> and in addition, these regions are formed in contact with each other to make the connecting wirings be disused. Thereafter, electrodes 30 and 31 are provided as usual through gate oxidized films 28 and 29.
JP15459879A 1979-11-29 1979-11-29 Semiconductor device Granted JPS5678157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15459879A JPS5678157A (en) 1979-11-29 1979-11-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15459879A JPS5678157A (en) 1979-11-29 1979-11-29 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5678157A true JPS5678157A (en) 1981-06-26
JPS6331106B2 JPS6331106B2 (en) 1988-06-22

Family

ID=15587678

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15459879A Granted JPS5678157A (en) 1979-11-29 1979-11-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5678157A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362105U (en) * 1989-10-16 1991-06-18
JPH0426205U (en) * 1990-06-22 1992-03-02

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52113176A (en) * 1976-03-18 1977-09-22 Matsushita Electric Ind Co Ltd Semiconductor device
JPS52113177A (en) * 1976-03-18 1977-09-22 Matsushita Electric Ind Co Ltd Semiconductor device
JPS55117266A (en) * 1979-02-26 1980-09-09 Rca Corp Integrated circuit structure
JPS5660015A (en) * 1979-10-22 1981-05-23 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52113176A (en) * 1976-03-18 1977-09-22 Matsushita Electric Ind Co Ltd Semiconductor device
JPS52113177A (en) * 1976-03-18 1977-09-22 Matsushita Electric Ind Co Ltd Semiconductor device
JPS55117266A (en) * 1979-02-26 1980-09-09 Rca Corp Integrated circuit structure
JPS5660015A (en) * 1979-10-22 1981-05-23 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS6331106B2 (en) 1988-06-22

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