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JPS6417476A - Mos gate bipolar transistor - Google Patents

Mos gate bipolar transistor

Info

Publication number
JPS6417476A
JPS6417476A JP62172289A JP17228987A JPS6417476A JP S6417476 A JPS6417476 A JP S6417476A JP 62172289 A JP62172289 A JP 62172289A JP 17228987 A JP17228987 A JP 17228987A JP S6417476 A JPS6417476 A JP S6417476A
Authority
JP
Japan
Prior art keywords
layer
carrier
region
polycrystalline silicon
bipolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62172289A
Other languages
Japanese (ja)
Inventor
Kazuo Matsuzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62172289A priority Critical patent/JPS6417476A/en
Publication of JPS6417476A publication Critical patent/JPS6417476A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures

Landscapes

  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To erase remaining carrier or the like in a carrier conducting region in a short time and to shorten an opening time by forming the same conductivity type polycrystalline silicon layer is provided so as to cross a carrier conducting passage in the carrier conducting region. CONSTITUTION:A MOSFET is formed of a source layer 16, a channel forming region 14 and a drain layer 1, and a bipolar transistor is formed of a p-type layer 13, a carrier conducting region 4 and a drain layer 1. The region 4 is interposed between an n-type epitaxial layer 2 and a substrate 3, and therebetween, and formed of the same conductivity type polycrystalline silicon layer 5 as that of these regions. The layer 5 is erased by collecting minority carrier remaining or injected into the carrier conducting region at the time of opening at the grain lump boundary of the polycrystalline silicon as a recombination center in a short time. Thus, the opening time can be shortened.
JP62172289A 1987-07-10 1987-07-10 Mos gate bipolar transistor Pending JPS6417476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62172289A JPS6417476A (en) 1987-07-10 1987-07-10 Mos gate bipolar transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62172289A JPS6417476A (en) 1987-07-10 1987-07-10 Mos gate bipolar transistor

Publications (1)

Publication Number Publication Date
JPS6417476A true JPS6417476A (en) 1989-01-20

Family

ID=15939170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62172289A Pending JPS6417476A (en) 1987-07-10 1987-07-10 Mos gate bipolar transistor

Country Status (1)

Country Link
JP (1) JPS6417476A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323059A (en) * 1991-05-06 1994-06-21 Motorola, Inc. Vertical current flow semiconductor device utilizing wafer bonding
JPH1012628A (en) * 1996-06-20 1998-01-16 Nec Corp Semiconductor substrate, method of manufacturing the same, and semiconductor element
US5841197A (en) * 1994-11-18 1998-11-24 Adamic, Jr.; Fred W. Inverted dielectric isolation process
US6124179A (en) * 1996-09-05 2000-09-26 Adamic, Jr.; Fred W. Inverted dielectric isolation process
JPWO2012056536A1 (en) * 2010-10-27 2014-03-20 富士電機株式会社 Semiconductor device and manufacturing method of semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63127572A (en) * 1986-11-17 1988-05-31 Nissan Motor Co Ltd Conductivity modulation type mosfet

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63127572A (en) * 1986-11-17 1988-05-31 Nissan Motor Co Ltd Conductivity modulation type mosfet

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323059A (en) * 1991-05-06 1994-06-21 Motorola, Inc. Vertical current flow semiconductor device utilizing wafer bonding
US5841197A (en) * 1994-11-18 1998-11-24 Adamic, Jr.; Fred W. Inverted dielectric isolation process
JPH1012628A (en) * 1996-06-20 1998-01-16 Nec Corp Semiconductor substrate, method of manufacturing the same, and semiconductor element
US6124179A (en) * 1996-09-05 2000-09-26 Adamic, Jr.; Fred W. Inverted dielectric isolation process
JPWO2012056536A1 (en) * 2010-10-27 2014-03-20 富士電機株式会社 Semiconductor device and manufacturing method of semiconductor device
US9070737B2 (en) 2010-10-27 2015-06-30 Fuji Electric Co., Ltd. Semiconductor device with low-lifetime region
US9460927B2 (en) 2010-10-27 2016-10-04 Fuji Electric Co., Ltd. Semiconductor device manufacturing method

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