[go: up one dir, main page]

JPS6384014A - Manufacture of semiconductor single crystal layer - Google Patents

Manufacture of semiconductor single crystal layer

Info

Publication number
JPS6384014A
JPS6384014A JP61227187A JP22718786A JPS6384014A JP S6384014 A JPS6384014 A JP S6384014A JP 61227187 A JP61227187 A JP 61227187A JP 22718786 A JP22718786 A JP 22718786A JP S6384014 A JPS6384014 A JP S6384014A
Authority
JP
Japan
Prior art keywords
film
silicon
single crystal
crystal layer
porous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61227187A
Other languages
Japanese (ja)
Other versions
JPH0517693B2 (en
Inventor
Tomoyasu Inoue
井上 知泰
Toshihiko Hamazaki
浜崎 利彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP61227187A priority Critical patent/JPS6384014A/en
Publication of JPS6384014A publication Critical patent/JPS6384014A/en
Publication of JPH0517693B2 publication Critical patent/JPH0517693B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To form a semiconductor single crystal layer having no crystal defect by depositing as a protective film a porous silicon oxide film on a polycrystalline silicon film, and letting the oxygen in a melted silicon escape outside through the protective film in case of annealing. CONSTITUTION:An SiO2 insulating film 12 is deposited on a single crystal silicon substrate 11, and a polycrystalline silicon film 14 is deposited thereby by a CVD method using a thermal decomposing method. Then, a polycrystalline silicon film 13 is covered as a protective film with the silicon oxide film 14. Then, the film 13 is annealed to be melted and recrystallized. In case of the annealing, the oxygen in a melted silicon escapes outside through the film 14. Accordingly, since an oxygen concentration in the silicon can be reduced to a silicon solid solution limit or lower, a silicon single crystal layer of high quality with less crystal defect can be formed.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、絶縁膜上にシリコン等の単結晶層を形成する
技術に係わり、特に酸素や不純物濃度が低く、結晶欠陥
の少ない半導体単結晶層を製造する方法に関する。
[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a technology for forming a single crystal layer of silicon or the like on an insulating film, and in particular has a low concentration of oxygen and impurities, and is free from crystal defects. The present invention relates to a method for manufacturing a semiconductor single crystal layer with a small amount of oxidation.

(従来の技術) 近年、電子ビームやレーザビーム等を利用したビームア
ニール法により、Sol膜(絶縁膜上のシリコン膜)を
形成する技術の開発が盛んに行われている。このSOI
技術の目指すところは、SOI膜の形成には、単結晶シ
リコン基板上に絶縁層としての5i02膜を形成し、そ
の上に多結晶シリコン膜及び保護膜としての5i02膜
を堆積した構造を製作する。そして、上記のビームアニ
ール法により、多結晶シリコン膜を溶融・再結晶化させ
て、多結晶シリコン膜を単結晶化させる。この場合、ア
ニールの条件によっても異なるが、再結晶化後のSol
膜は完全な単結晶層とはならず、種々の方位を持つ1〜
100[μ77Z]程度の大きさの多結晶層となる。
(Prior Art) In recent years, technology for forming a Sol film (silicon film on an insulating film) by a beam annealing method using an electron beam, a laser beam, or the like has been actively developed. This SOI
The aim of the technology is to form a SOI film by forming a 5i02 film as an insulating layer on a single crystal silicon substrate, and then depositing a polycrystalline silicon film and a 5i02 film as a protective film on top of it. . Then, by the beam annealing method described above, the polycrystalline silicon film is melted and recrystallized to form a single crystal. In this case, although it depends on the annealing conditions, Sol after recrystallization
The film is not a complete single-crystal layer, but consists of 1 to 1 crystals with various orientations.
This results in a polycrystalline layer with a size of about 100 [μ77Z].

また、絶縁膜の一部に開孔部を設け、この開孔部をシー
ドとして用いる方法が提案されている。
Furthermore, a method has been proposed in which an opening is provided in a part of the insulating film and the opening is used as a seed.

この場合、開孔部ではシリコン膜がシリコン基板と直接
接触しているので、シリコン基板から縦方向及びそれに
続いて横方向にエピタキシャル成長が進行し、シリコン
基板の結晶方位情報を絶縁膜上に成長する単結晶層に与
えることができる。しかしながら、この方法を用いても
、シリコン基板と同一方位の単結晶層は、上記開孔部か
らの距離として高々 100[μm]程度しか成長せず
、それコン膜が溶融状態にある際に、その上下に隣接す
る5i02膜の一部が溶解し、溶融シリコン中の酸素濃
度が高まりシリコン中の固溶限界濃度を越えてしまうた
め、シリコンが再結晶化する際に析出物が生成し、それ
が結晶粒界発生につながるものと考えられる。融点直下
の固相シリコン中の酸素の固溶限は1.5〜3xlO[
01−3コであり、通常のSOI再結晶化層中の酸素濃
度は〜10[n−3コ程度であるため、上記の結晶粒界
発生に関する考察は正当なものと言える。なお、第4図
中41は単結晶シリコン基板、42は5i02絶縁膜、
43は多結晶シリコン膜、44は5i02保護膜、45
は単結晶化部、46は溶融部を示している。
In this case, since the silicon film is in direct contact with the silicon substrate in the opening, epitaxial growth progresses from the silicon substrate in the vertical direction and then in the horizontal direction, and the crystal orientation information of the silicon substrate is transferred to the insulating film. It can be applied to a single crystal layer. However, even if this method is used, the single crystal layer in the same orientation as the silicon substrate will only grow at a distance of about 100 [μm] from the opening, and when the condensation film is in a molten state, Part of the 5i02 film adjacent above and below it dissolves, and the oxygen concentration in the molten silicon increases, exceeding the solid solubility limit concentration in silicon. When the silicon recrystallizes, precipitates are formed and This is thought to lead to the generation of grain boundaries. The solid solubility limit of oxygen in solid silicon just below the melting point is 1.5 to 3xlO[
01-3, and the oxygen concentration in a normal SOI recrystallized layer is about 10 [n-3, so the above considerations regarding the generation of grain boundaries can be said to be valid. In addition, in FIG. 4, 41 is a single crystal silicon substrate, 42 is a 5i02 insulating film,
43 is a polycrystalline silicon film, 44 is a 5i02 protective film, 45
46 indicates a single crystallized portion, and 46 indicates a melted portion.

上記の問題を解決する方法として、保護用の5i02膜
の一部を開孔させる手法が提案されている。これは、溶
融したシリコン層中に含まれている過剰な酸素原子がシ
リコン原子と結合した一酸化シリコン(Sin)の形で
、上記開孔部から蒸発する現象を利用するものである。
As a method for solving the above problem, a method has been proposed in which a portion of the protective 5i02 film is opened. This utilizes the phenomenon in which excess oxygen atoms contained in the molten silicon layer evaporate from the opening in the form of silicon monoxide (Sin) bonded to silicon atoms.

この方法に表面平坦性に問題があり、高密度集積回路素
子を形成することは困難である。
This method has problems with surface flatness, making it difficult to form high-density integrated circuit devices.

(発明が解決しようとする問題点) このように従来方法では、シリコンの再結晶化過程にお
ける溶融シリコン中の酸素濃度の増大を避けることはで
きず、結晶粒界発生を招き、良質のシリコン単結晶層を
製造することは困難であった。また、保護膜の一部を開
口すると、最終的に得られるSOI膜の表面平坦性が低
下する等のはかることができ、絶縁膜上に結晶欠陥の少
ない高品質のシリコン単結晶層を形成することのできる
半導体単結晶層の製造方法を提供することにある。
(Problems to be Solved by the Invention) As described above, in the conventional method, it is impossible to avoid an increase in the oxygen concentration in molten silicon during the recrystallization process of silicon, which leads to the generation of grain boundaries, which leads to the formation of high-quality silicon monomers. It was difficult to produce crystalline layers. In addition, opening a part of the protective film can reduce the surface flatness of the final SOI film, thereby forming a high-quality silicon single crystal layer with few crystal defects on the insulating film. An object of the present invention is to provide a method for manufacturing a semiconductor single crystal layer that can be manufactured by using a semiconductor single crystal layer.

[発明の(14成] (問題点を解決するための手段) 本発明の骨子は、Sol膜の表面保護膜に、酸素原子や
酸化シリコン分子に対し透過性に富む物質を用いること
により、シリコンの再結晶化過程でシリコン中の過剰な
酸素を外方拡散させ、Sol再結晶化層の酸素濃度を低
減化し、従来技術での過剰酸素に起因した転位、双晶、
積層欠陥。
[Number 14 of the Invention] (Means for Solving the Problems) The gist of the present invention is to use a substance that is highly permeable to oxygen atoms and silicon oxide molecules for the surface protection film of the Sol film. In the recrystallization process, excess oxygen in silicon is diffused outward, reducing the oxygen concentration in the Sol recrystallized layer, and eliminating dislocations, twins, and
Stacking fault.

結晶粒界等の結晶欠陥の発生を抑制することにある。さ
らに、上記酸素原子や酸化シリコン分子に対し透過性に
富む物質として、多孔質の薄膜を用いることにある。
The purpose is to suppress the occurrence of crystal defects such as grain boundaries. Furthermore, a porous thin film is used as the substance highly permeable to the oxygen atoms and silicon oxide molecules.

即ち本発明は、半導体基板上に形成された絶縁膜上に半
導体単結晶層を製造する方法において、前記絶縁膜上に
非晶質若しくは多結晶の半導体薄膜を形成したのち、こ
の半導体薄膜上に多孔質薄上記の方法であれば、シリコ
ンの溶融・再結晶化過程で、シリコン層に接する5i0
2等の絶縁膜からシリコン中に溶出する過剰な酸素を、
保護膜を通して外方に移動させることができる。従って
、シリコン中の酸素濃度を、シリコンの固溶限以内に低
減することが可能となる。その結果、従来技術における
、S01層中の過剰な酸素の析出に起因した結晶欠陥の
発生を抑制することが可能となる。
That is, the present invention provides a method for manufacturing a semiconductor single crystal layer on an insulating film formed on a semiconductor substrate, in which an amorphous or polycrystalline semiconductor thin film is formed on the insulating film, and then a semiconductor thin film is formed on the semiconductor thin film. Porous Thin With the method described above, 5i0 in contact with the silicon layer is
Excess oxygen eluted from the second grade insulating film into silicon,
It can be moved outward through the protective membrane. Therefore, it is possible to reduce the oxygen concentration in silicon to within the solid solubility limit of silicon. As a result, it becomes possible to suppress the occurrence of crystal defects caused by excessive precipitation of oxygen in the S01 layer in the prior art.

(実施例) 以下、本発明の詳細を図示の実施例によって説明する。(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

第1図(a)〜(c)は本発明の第1の実施例に係わる
シリコン単結晶層の製造工程を示す断面図である。まず
、第1図(a)に示す如く、(100)方位の単結晶シ
リコン基板11上にCVD法により厚さ 1.5[μ7
7Z]の5i02膜(絶縁膜)12を堆積し、その上に
SiH4の熱分解を用いたCVD法により厚さ0.6[
μm]の化膜14は、酸素原子、酸素分子及び酸化シリ
コン分子等よりも大きな孔を多数含んでいるため、これ
らが容易に該被膜中を拡散できると共に、溶融したシリ
コンの液滴に比較すると被膜に含まれる孔は十分に小さ
いので、SOI層の溶融・再結晶化過程において、十分
な性能の表面保護膜として機能するものである。
FIGS. 1(a) to 1(c) are cross-sectional views showing the manufacturing process of a silicon single crystal layer according to a first embodiment of the present invention. First, as shown in FIG. 1(a), a single crystal silicon substrate 11 with a (100) orientation is coated with a thickness of 1.5 [μ7] by CVD.
A 5i02 film (insulating film) 12 of 7Z] is deposited, and a 5i02 film (insulating film) 12 of 0.6[
μm] film 14 contains many pores larger than oxygen atoms, oxygen molecules, silicon oxide molecules, etc., so these can easily diffuse through the film, and compared to molten silicon droplets, Since the pores contained in the film are sufficiently small, it functions as a surface protective film with sufficient performance during the melting and recrystallization process of the SOI layer.

なお、上記多孔質シリコン酸化膜14の形成には、例え
ばSiH4及び02の混合ガスのマイク[cc/min
 ] 、チャンバ内圧力1  [torrl 、マイク
ロ波(2,45G Hz )電力500 [Wコとした
。堆積速度は〜150[入/see]と高速のため、多
孔質性のシリコン酸化膜が形成される。本実施例では、
40秒間の堆積により〜0.6[μ77Z]厚の多孔質
シリコン酸化膜を形成した。
In addition, for forming the porous silicon oxide film 14, for example, a microphone [cc/min] of a mixed gas of SiH4 and 02 is used.
], chamber internal pressure 1 [torrl, microwave (2.45 GHz), power 500 [W]. Since the deposition rate is as high as ~150 [in/see], a porous silicon oxide film is formed. In this example,
By depositing for 40 seconds, a porous silicon oxide film with a thickness of ~0.6 [μ77Z] was formed.

以上の手順で作成した試料を、第1図(c)に示す如く
、電子ビーム15の走査によりビームアニールした。即
ち、走査型電子ビームアニールにより、多結晶シリコン
膜13を順次溶融・再結晶化させた。ここで、電子ビー
ムは36[MHz]の振幅変調した正弦波により、半値
幅約150[μ771]のスポットビームを一方向に高
速偏向することにより、長さ約5[M]に疑似的に線状
化したものを用いた。振幅変調には、周波数10[KH
z]で線状化ビームの長さ方向強度分布を均一化するた
めに、計算機制御された波形を持つ変調波を用いた。
The sample prepared by the above procedure was beam annealed by scanning with an electron beam 15, as shown in FIG. 1(c). That is, the polycrystalline silicon film 13 was sequentially melted and recrystallized by scanning electron beam annealing. Here, the electron beam is formed into a pseudo line with a length of about 5 [M] by rapidly deflecting a spot beam with a half-width of about 150 [μ771] in one direction using a 36 [MHz] amplitude-modulated sine wave. We used the one that had been transformed into a For amplitude modulation, frequency 10 [KH
z], a modulated wave with a computer-controlled waveform was used to equalize the longitudinal intensity distribution of the linearized beam.

この線状化ビームを線状方向と直角な方向に走査した。This linearized beam was scanned in a direction perpendicular to the linear direction.

走査速度は100 [M/see ] 、ビーム加の結
晶粒界が多数存在するが、本実施例では平均間隔が20
0[μ7rL]となり、均一な単結晶領域の面積が飛躍
的に増大した。この効果は、再結晶化過程において、溶
融した301層中の過剰な酸素が多孔質シリコン酸化膜
14中を、無数の微細な孔を通って高速に拡散し、表面
から蒸発することにより、S01層中の酸素濃度が大幅
に低減されたことに基くものと考えられる。
The scanning speed is 100 [M/see], and there are many grain boundaries due to beam application, but in this example, the average interval is 20
0 [μ7rL], and the area of the uniform single crystal region increased dramatically. This effect occurs because during the recrystallization process, excess oxygen in the melted 301 layer diffuses at high speed through countless fine pores in the porous silicon oxide film 14 and evaporates from the surface. This is thought to be due to a significant reduction in the oxygen concentration in the layer.

かくして本実施例方法によれば、多結晶シリコン膜13
上に保護膜としての多孔質シリコン酸化膜14を堆積し
ておくことにより、ビームアニールの際に溶融シリコン
中の酸素を外方に逃がすこ、とができ、シリコン中の酸
素濃度をシリコンの固溶限以下に低減させることができ
る。このため、結晶粒界発生を抑制することができ、結
晶欠陥の少ない良質のシリコン単結晶層を形成すること
ができる。また、保護膜としての多孔質シリコン酸化膜
14は連続した状態であるので、形成されるSol膜の
表面平坦性は良好なものとなる。
Thus, according to the method of this embodiment, the polycrystalline silicon film 13
By depositing a porous silicon oxide film 14 on top as a protective film, oxygen in the molten silicon can escape to the outside during beam annealing, and the oxygen concentration in the silicon can be lowered to the solid state of the silicon. It can be reduced below the solubility limit. Therefore, the generation of grain boundaries can be suppressed, and a high quality silicon single crystal layer with few crystal defects can be formed. Further, since the porous silicon oxide film 14 as a protective film is continuous, the surface flatness of the formed Sol film is good.

次に、本発明の第2の実施例方法について説明は、先の
実施例で用いた試料の上部にCVD法により、厚さ 0
.1[μm]の多結晶シリコン膜16を堆積させたもの
である。
Next, the method of the second embodiment of the present invention will be explained.
.. A polycrystalline silicon film 16 having a thickness of 1 [μm] is deposited.

この試料を先の実施例と同様に、走査型電子ビームアニ
ールにより、301層を溶融や再結晶化させた。この結
果得られたS01層では、結晶粒界の発生は極めて少な
く、結晶粒界の間隔は1〜3 [M]と広く、部分的に
は〜5 [M]間隔の領域も存在する。このような大面
積の単結晶層は、酸化膜14中を拡散し、表面の多結晶
シリコン膜16のシリコン原子と反応して5i02層を
形成することにより、S01層中の酸素濃度がシリコン
中の酸素の固溶限よりも大幅に低いものとなり、結晶粒
界発生が完全に抑制されたためと考えられる。
As in the previous example, this sample was subjected to scanning electron beam annealing to melt and recrystallize the 301 layer. In the S01 layer obtained as a result, the occurrence of grain boundaries is extremely small, and the interval between grain boundaries is as wide as 1 to 3 [M], with some regions having an interval of ~5 [M]. Such a large-area single-crystal layer diffuses through the oxide film 14 and reacts with silicon atoms of the polycrystalline silicon film 16 on the surface to form a 5i02 layer, so that the oxygen concentration in the S01 layer becomes lower than that in the silicon. It is thought that this is because the solid solubility limit of oxygen was significantly lower than the solid solubility limit of oxygen, and the generation of grain boundaries was completely suppressed.

次に、本発明の第3の実施例方法について説明する。こ
の実施例では、試料として第3図に示す構造のものを用
いた。即ち、(100)面方位の単結晶シリコン基板1
1上にCVD法により厚さ2[μm]の5i02膜12
を堆積し、通常のフォトエツチング法により幅2 [μ
m]のシード部とすべき開口部17を形成し、次いでS
iH4の熱分解を用いたCVD法により全面に厚さ 0
.6[μm]の多結晶シリコン膜13を堆積する。さら
に、その上に第2の実施例と同様に、多孔質シリコン酸
化膜14及び多結晶シリコン膜16を順次堆積させたも
のである。
Next, a third embodiment method of the present invention will be described. In this example, the structure shown in FIG. 3 was used as a sample. That is, a single crystal silicon substrate 1 with (100) plane orientation
1, a 5i02 film 12 with a thickness of 2 [μm] is formed by CVD method.
is deposited and then processed to a width of 2 [μ
m] to form the opening 17 to be the seed part, and then
The entire surface is coated with a thickness of 0 using the CVD method using thermal decomposition of iH4.
.. A polycrystalline silicon film 13 of 6 [μm] is deposited. Furthermore, as in the second embodiment, a porous silicon oxide film 14 and a polycrystalline silicon film 16 are sequentially deposited thereon.

この試料を、走査型電子ビームアニールにより、S01
層を溶融・再結晶化させた。この結果得らドで囲まれた
領域が結晶粒界の自宛全単結晶層として得られた。
This sample was subjected to scanning electron beam annealing.
The layer was melted and recrystallized. As a result, the region surrounded by dots was obtained as a self-directed whole single crystal layer of grain boundaries.

なお、本発明は上述した各実施例方法に限定されるもの
ではない。例えば、SO■の上部に被着する表面保護膜
としては、多孔質シリコン酸化膜に限らず、多孔質薄膜
であればよい。多孔質薄膜としては、多孔質シリコン酸
化膜の他に、酸素をんだ多孔質シリコン膜、多孔質アル
ミナ膜、多孔質イツトリア、多孔質ジルコニア、多孔質
ハフニウム酸化膜、或いはこれらの混合物等を用いるこ
とができる。また、これらの多孔質薄膜の形成には、マ
イクロ波放電を利用した気相反応に限らず、スパッタリ
ング法、真空蒸着法、陽極酸化法等を用いることが可能
である。
Note that the present invention is not limited to the methods of each embodiment described above. For example, the surface protective film to be deposited on top of the SO2 is not limited to a porous silicon oxide film, but may be any porous thin film. As the porous thin film, in addition to the porous silicon oxide film, an oxygen-containing porous silicon film, a porous alumina film, a porous yttoria, a porous zirconia, a porous hafnium oxide film, or a mixture thereof is used. be able to. In addition, the formation of these porous thin films is not limited to gas phase reaction using microwave discharge, but may also include sputtering, vacuum evaporation, anodic oxidation, and the like.

また、多孔質薄膜の上部に設ける酸素吸収層の材料は、
必ずしも多結晶シリコンである必要はなく、非晶質シリ
コン、ゲルマニウム、GaAs。
In addition, the material of the oxygen absorption layer provided on the top of the porous thin film is
It does not necessarily have to be polycrystalline silicon, but can be amorphous silicon, germanium, or GaAs.

GaP等の半導体やSn、Ti、Hf、Nb。Semiconductors such as GaP, Sn, Ti, Hf, Nb.

Fe、Cu、In、Sb、Ni、Pd、Aノ等の用いた
ゾーンメルティング法(ZMR法)等を用いても同様の
効果が得られる。また、半導体薄膜としては、多結晶シ
リコンの代りに、非晶質シリコンを用いることができ、
さらに他の半導体装置を用いることも可能である。その
他、本発明の要旨を逸脱しない範囲で、種々変形して実
施することができる。
Similar effects can be obtained by using a zone melting method (ZMR method) using Fe, Cu, In, Sb, Ni, Pd, A, etc. Furthermore, as the semiconductor thin film, amorphous silicon can be used instead of polycrystalline silicon.
Furthermore, it is also possible to use other semiconductor devices. In addition, various modifications can be made without departing from the gist of the present invention.

[発明の効果] 防止することができる。従って、絶縁膜上に結晶欠陥の
少ない良質の半導体単結晶層を形成することができる。
[Effects of the invention] Can be prevented. Therefore, a high quality semiconductor single crystal layer with few crystal defects can be formed on the insulating film.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(c)は本発明の第1の実施例方法に係
わるシリコン単結晶層の製造工程を示す断面図、第2図
は本発明の第2の実施例方法に用いた試料構造を示す断
面図、第3図は本発明の第3の実施例方法に用いた試料
構造を示す断面図、第4図は従来の問題点を説明するた
めの模式図である。 11・・・単結晶シリコン基板、12・・・5i02膜
(絶縁膜)、13・・・多結晶シリコン膜(半導体薄膜
)、14・・・多孔質シリコン酸化膜(保護膜)、15
・・・電子ビーム、16・・・多結晶シリコン膜、17
・・・開口部。
FIGS. 1(a) to (c) are cross-sectional views showing the manufacturing process of a silicon single crystal layer according to the method of the first embodiment of the present invention, and FIG. FIG. 3 is a cross-sectional view showing the sample structure used in the third embodiment method of the present invention, and FIG. 4 is a schematic diagram for explaining the problems of the conventional method. 11... Single crystal silicon substrate, 12... 5i02 film (insulating film), 13... Polycrystalline silicon film (semiconductor thin film), 14... Porous silicon oxide film (protective film), 15
...electron beam, 16...polycrystalline silicon film, 17
···Aperture.

Claims (6)

【特許請求の範囲】[Claims] (1)半導体基板上に形成された絶縁膜上に半導体単結
晶層を製造する方法において、前記絶縁膜上に非晶質若
しくは多結晶の半導体薄膜を形成するをアニールして溶
融・再結晶化する工程とを含むことを特徴とする半導体
単結晶層の製造方法。
(1) In a method of manufacturing a semiconductor single crystal layer on an insulating film formed on a semiconductor substrate, an amorphous or polycrystalline semiconductor thin film is formed on the insulating film by annealing and melting/recrystallization. A method for manufacturing a semiconductor single crystal layer, comprising the steps of:
(2)前記保護膜として、多孔質シリコン酸化膜を用い
たことを特徴とする特許請求の範囲第1項記載の半導体
単結晶層の製造方法。
(2) The method for manufacturing a semiconductor single crystal layer according to claim 1, wherein a porous silicon oxide film is used as the protective film.
(3)前記保護膜として、酸素を含む多孔質シリコン膜
、多孔質アルミナ膜、多孔質ジルコニア膜、多孔質イッ
トリア膜、或いは多孔質ハフニウム酸化膜、またはこれ
らの混合物を用いたことを特徴とする特許請求の範囲第
1項記載の半導体単結晶層の製造方法。
(3) The protective film is characterized in that a porous silicon film containing oxygen, a porous alumina film, a porous zirconia film, a porous yttria film, a porous hafnium oxide film, or a mixture thereof is used. A method for manufacturing a semiconductor single crystal layer according to claim 1.
(4)前記半導体薄膜をアニールする前に、前記保護膜
の上に半導体層及び金属層の少なくとも一方を被着する
ことを特徴とする特許請求の範囲第1項、第2項又は第
3項記載の半導体単結晶層の製造方法。
(4) Before annealing the semiconductor thin film, at least one of a semiconductor layer and a metal layer is deposited on the protective film. The method for manufacturing the semiconductor single crystal layer described above.
(5)前記保護膜の形成工程として、マイクロ波放電を
利用した気相反応を用いたことを特徴とする特許請求の
範囲第1項記載の半導体単結晶層の製造方法。
(5) The method for manufacturing a semiconductor single crystal layer according to claim 1, characterized in that the step of forming the protective film uses a gas phase reaction using microwave discharge.
(6)前記半導体薄膜をアニールする工程として、電子
ビーム或いはレーザービームを用いたことを特徴とする
特許請求の範囲第1項記載の半導体単結晶層の製造方法
(6) The method for manufacturing a semiconductor single crystal layer according to claim 1, wherein an electron beam or a laser beam is used in the step of annealing the semiconductor thin film.
JP61227187A 1986-09-27 1986-09-27 Manufacture of semiconductor single crystal layer Granted JPS6384014A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61227187A JPS6384014A (en) 1986-09-27 1986-09-27 Manufacture of semiconductor single crystal layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61227187A JPS6384014A (en) 1986-09-27 1986-09-27 Manufacture of semiconductor single crystal layer

Publications (2)

Publication Number Publication Date
JPS6384014A true JPS6384014A (en) 1988-04-14
JPH0517693B2 JPH0517693B2 (en) 1993-03-09

Family

ID=16856852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61227187A Granted JPS6384014A (en) 1986-09-27 1986-09-27 Manufacture of semiconductor single crystal layer

Country Status (1)

Country Link
JP (1) JPS6384014A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6392012A (en) * 1986-10-01 1988-04-22 コーニング グラス ワークス Laminated article and manufacture of the same
US5123975A (en) * 1989-03-28 1992-06-23 Ricoh Company, Ltd. Single crystal silicon substrate
US5405802A (en) * 1992-01-31 1995-04-11 Canon Kabushiki Kaisha Process of fabricating a semiconductor substrate
AT513692A1 (en) * 2012-12-10 2014-06-15 Tgw Logistics Group Gmbh Sorting system and method for sorting objects in a conveyor system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6392012A (en) * 1986-10-01 1988-04-22 コーニング グラス ワークス Laminated article and manufacture of the same
US5123975A (en) * 1989-03-28 1992-06-23 Ricoh Company, Ltd. Single crystal silicon substrate
US5405802A (en) * 1992-01-31 1995-04-11 Canon Kabushiki Kaisha Process of fabricating a semiconductor substrate
US5679475A (en) * 1992-01-31 1997-10-21 Canon Kabushiki Kaisha Semiconductor substrate and process for preparing the same
AT513692A1 (en) * 2012-12-10 2014-06-15 Tgw Logistics Group Gmbh Sorting system and method for sorting objects in a conveyor system

Also Published As

Publication number Publication date
JPH0517693B2 (en) 1993-03-09

Similar Documents

Publication Publication Date Title
KR960001466B1 (en) Semiconductor materials, fabrication methods thereof, and thin film transistors
JPS58130517A (en) Manufacture of single crystal thin film
JPS60202952A (en) Manufacture of semiconductor device
GB2142346A (en) Method of formation of layer of multiconstituent material
JPS6384014A (en) Manufacture of semiconductor single crystal layer
JP3138174B2 (en) Low temperature selective growth method of silicon or silicon alloy
JP2840081B2 (en) Semiconductor thin film manufacturing method
JP2774855B2 (en) Gettering effect enhanced silicon substrate and method of manufacturing the same
JPS63283013A (en) Forming method for polycrystalline silicon thin film
JPH11251241A (en) Method for manufacturing crystalline silicon layer, method for manufacturing solar cell, and method for manufacturing thin film transistor
JPH01149483A (en) Solar cell
JPS61174621A (en) Manufacture of semiconductor thin crystal
JP2706770B2 (en) Semiconductor substrate manufacturing method
JPH0361335B2 (en)
JPH01149418A (en) Substrate for electronic element and manufacture thereof
JPS6384013A (en) Manufacture of semiconductor crystal layer
JPS6012775B2 (en) Method for forming a single crystal semiconductor layer on a foreign substrate
JPH02105517A (en) Manufacture of semiconductor device
JPH0334847B2 (en)
JP2861683B2 (en) Method of forming amorphous silicon film
JPH04151820A (en) Semiconductor device
Inoue et al. Electron-beam recrystallization of silicon layers on silicon dioxide
JPS5893218A (en) Manufacture of semiconductor thin film structure
JP2002118120A (en) Thin film transistor and its manufacturing method
JPS59101822A (en) Manufacture of substrate for semiconductor device

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term