JPS6012775B2 - Method for forming a single crystal semiconductor layer on a foreign substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming high quality semiconductor layers on a foreign substrate.

1. Generally, as a method for forming a semiconductor layer on a heterogeneous substrate, there are known methods such as a vapor phase growth method using a chemical reaction in a gas phase or thermal decomposition, a vacuum evaporation method, a sputtering method, and the like. When a semiconductor layer is formed on a heterogeneous substrate, due to differences in crystal structure, lattice constant, etc. between the substrate and the semiconductor layer, the formed semiconductor layer has lattice defect dislocations, stacking irregularities, etc. Many grain boundaries etc. occur.

For this reason, there is a drawback that the carrier mobility of the formed semiconductor layer itself is low. In order to eliminate this drawback, attempts have been made to form a semiconductor layer by growing it once at a high temperature, but this method conversely deteriorates the smoothness of the surface of the semiconductor layer.

The present invention has been made in view of the above points, and provides a method for forming a high-quality semiconductor layer having few lattice defects, a smooth surface, and high carrier mobility on a heterogeneous substrate.

The present invention will be explained below by way of an example.

Example 1-a Silicon was selected as the semiconductor to be grown, and a spinel single crystal was selected as the substrate different from silicon for growth.

First, a (100)-plane spinel single crystal was prepared and heated to a temperature of, for example, 1000q0. Then, a gas containing SiH4 gas at a volume ratio of 0.1% to the carrier gas was introduced onto the spinel single crystal. In this way, at a growth rate of 0.4 microns per minute, a first layer with a layer thickness of 0.2 microns was produced.
A silicon single crystal semiconductor layer was grown on the spinel single crystal substrate. Next, heat treatment was carried out for 60 minutes at 1150 °C in an atmosphere of 02, N2, ~gas, etc. At this time, it is essential to select the heating temperature to be higher than the temperature during the growth. Note that when the heat treatment was performed in the 02 gas atmosphere, a Si02 film was formed on the grown silicon layer, so this was removed. In this way, the heat-treated first silicon layer is grown by a vapor phase growth method using ordinary SiH4 gas at a substrate temperature of, for example, 95 mm and a growth rate of 0.3 microns per minute.
A second silicon layer was formed with a layer thickness of microns.

Layer thickness 1 formed on a foreign substrate by the method explained above
When we measured the dislocation density of micron semiconductor layer silicon,
It showed an extremely small value of 5 x 107/square.

Incidentally, in a single manufacturing process, for example, when a silicon layer with a thickness of 1 micron is formed using a gas for Si at a substrate temperature of 950°C and a growth rate of 0.3 microns per minute, the dislocation density is 3.
It was ×1 p/m. Further, a predetermined amount of impurity was mixed into the carrier gas during the formation of the semiconductor layer, and the hole (Y11) mobility of the formed semiconductor layer was measured. That is, when a silicon semiconductor layer having n-type carriers of 1×1 and 6/cc was formed by mixing phosphorus as an impurity, the hole mobility of this semiconductor layer was 650/V·sec. Incidentally, the hole mobility of the conventional semiconductor layer formed in a single process was as low as 450/V·sec. in this way,
A semiconductor layer with a low dislocation density and a high hole mobility can only be obtained by performing growth in two steps and simultaneously subjecting the first semiconductor layer to a high-temperature heat treatment once. Such a high temperature heat treatment step is important in the present invention. Furthermore, the effect of this high-temperature heat treatment was better when the first semiconductor layer was as thin as several hundred angstroms. Example 1-b Using (111) plane CaF2 as a foreign substrate,
I did the growth of 戊.

First, the degree of vacuum is 3×10-7 Ton. , substrate temperature 7500
A single crystal film with a layer thickness of 0.1 micron was grown at a temperature of 0. Thereafter, heat treatment was performed at 80,000 in vacuum. Then, a W layer with a final thickness of 0.5 microns was grown again at 750 pm. The dislocation density of the layer grown in this manner was lxl p/m. Incidentally, the dislocation density of the Q layer formed under the same conditions without going through the heat treatment step was 5×1 p/m. As explained above, a feature of the present invention is that a single crystal semiconductor layer with few lattice defects and excellent electrical characteristics can be obtained. Note that the heterogeneous substrate for single-crystal semiconductor layer growth includes sapphire, quartz, Mr.○, and L.
Insulating single crystal substrate such as INO03; Ga whistle, Gap,
Semiconductor single crystal substrates such as Q, Si, CdSe, and CdTe; metal single crystal substrates, etc. can be used.

Claims (1)

[Claims] 1. A step of growing a first single crystal semiconductor thin layer on a heterogeneous single crystal substrate at a temperature sufficient for growth, and a step of growing this first single crystal semiconductor thin layer at a temperature higher than the temperature sufficient for the growth. and a step of growing a second monocrystalline semiconductor layer of the same quality as the first monocrystalline semiconductor thin layer thicker on the heat-treated first monocrystalline semiconductor thin layer. A method for forming a single crystal semiconductor layer on a heterogeneous substrate, comprising: obtaining a low dislocation density single crystal semiconductor layer of a desired thickness consisting of a first layer and a second single crystal semiconductor layer on the heterogeneous single crystal substrate. .