JPH0517693B2 - - Google Patents
Info
- Publication number
- JPH0517693B2 JPH0517693B2 JP61227187A JP22718786A JPH0517693B2 JP H0517693 B2 JPH0517693 B2 JP H0517693B2 JP 61227187 A JP61227187 A JP 61227187A JP 22718786 A JP22718786 A JP 22718786A JP H0517693 B2 JPH0517693 B2 JP H0517693B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- single crystal
- silicon
- porous
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010408 film Substances 0.000 claims description 90
- 238000000034 method Methods 0.000 claims description 39
- 239000013078 crystal Substances 0.000 claims description 34
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 27
- 239000001301 oxygen Substances 0.000 claims description 27
- 229910052760 oxygen Inorganic materials 0.000 claims description 27
- 239000004065 semiconductor Substances 0.000 claims description 27
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 19
- 230000001681 protective effect Effects 0.000 claims description 18
- 239000010409 thin film Substances 0.000 claims description 18
- 229910021426 porous silicon Inorganic materials 0.000 claims description 16
- 238000000137 annealing Methods 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 11
- 238000010894 electron beam technology Methods 0.000 claims description 10
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 4
- 238000010574 gas phase reaction Methods 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 39
- 229910052710 silicon Inorganic materials 0.000 description 37
- 239000010703 silicon Substances 0.000 description 37
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 15
- 229910004298 SiO 2 Inorganic materials 0.000 description 10
- 230000007547 defect Effects 0.000 description 8
- 238000001953 recrystallisation Methods 0.000 description 8
- 238000000151 deposition Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000007787 solid Substances 0.000 description 5
- 230000008018 melting Effects 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- 125000004430 oxygen atom Chemical group O* 0.000 description 4
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000011148 porous material Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000005979 thermal decomposition reaction Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000004857 zone melting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
本発明は、絶縁膜上にシリコン等の単結晶層を
形成する技術に係わり、特に酸素や不純物濃度が
低く、結晶欠陥の少ない半導体単結晶層を製造す
る方法に関する。[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a technology for forming a single crystal layer of silicon or the like on an insulating film, and in particular has a low concentration of oxygen and impurities, and is free from crystal defects. The present invention relates to a method for manufacturing a semiconductor single crystal layer with a small amount of oxidation.
（従来の技術）
近年、電子ビームやレーザビーム等を利用した
ビームアニール法により、SOI膜（絶縁膜上のシ
リコン膜）を形成する技術の開発が盛んに行われ
ている。このSOI技術の目指すところは、SOI膜
上に２次元的に集積回路を形成して高速動作素子
を製作すること、さらに集積回路を多層に形成し
て３次元集積回路素子を製作することである。(Prior Art) In recent years, there has been active development of technology for forming SOI films (silicon films on insulating films) by beam annealing methods using electron beams, laser beams, and the like. The goal of this SOI technology is to fabricate high-speed operating devices by forming integrated circuits two-dimensionally on SOI films, and to fabricate three-dimensional integrated circuit devices by forming integrated circuits in multiple layers. .
SOI膜の形成には、単結晶シリコン基板上に絶
縁層としてのSiO2膜を形成し、その上に多結晶
シリコン膜及び保護膜としてのSiO2膜を堆積し
た構造を製作する。そして、上記のビームアニー
ル法により、多結晶シリコン膜を溶融・再結晶化
させて、多結晶シリコン膜を単結晶化させる。こ
の場合、アニールの条件によつても異なるが、再
結晶化後のSOI膜は完全な単結晶層とはならず、
種々の方位を持つ１〜100［μm］程度の大きさの
多結晶層となる
また、絶縁膜の一部に開孔部を設け、この開孔
部をシードとして用いる方法が提案されている。
この場合、開孔部ではシリコン膜がシリコン基板
と直接接触しているのえ、シリコン基板から縦方
向及びそれに続いて横方向にエピタキシヤル成長
が進行し、シリコン基板の結晶方位情報を絶縁膜
上に成長する単結晶層に与えることができる。し
かしながら、この方法を用いても、シリコン基板
と同一方位の単結晶層は、上記開孔部からの距離
として高々100［μm］程度しか成長せず、それ以
上の領域では亜結晶粒界や結晶粒界の発生を防ぐ
ことは困難であつた。 To form the SOI film, a structure is fabricated in which a SiO 2 film is formed as an insulating layer on a single crystal silicon substrate, and a polycrystalline silicon film and a SiO 2 film as a protective film are deposited thereon. Then, by the beam annealing method described above, the polycrystalline silicon film is melted and recrystallized to form a single crystal. In this case, although it depends on the annealing conditions, the SOI film after recrystallization does not become a complete single crystal layer.
A polycrystalline layer with a size of about 1 to 100 [μm] is formed with various orientations.Also, a method has been proposed in which an opening is provided in a part of the insulating film and the opening is used as a seed.
In this case, the silicon film is in direct contact with the silicon substrate in the opening, and epitaxial growth progresses from the silicon substrate in the vertical direction and subsequently in the horizontal direction, and the crystal orientation information of the silicon substrate is transferred onto the insulating film. can be applied to the single crystal layer that grows. However, even if this method is used, the single crystal layer in the same direction as the silicon substrate will only grow at a distance of about 100 [μm] from the above-mentioned opening, and in areas beyond that, subgrain boundaries and crystal It was difficult to prevent the occurrence of grain boundaries.
この問題の原因は、第４図に示すように、シリ
コン膜が溶融状態にある際に、その上下に隣接す
るSiO2膜の一部が溶解し、溶融シリコン中の酸
素濃度が高まりシリコン中の固溶限界濃度を越え
てしまうため、シリコンが再結晶化する際に析出
物が生成し、それが結晶粒界発生につながるもの
と考えられる。融点直下の固相シリコン中の酸素
の固溶限は1.5〜３×1018［cm-3］であり、通常の
SOI再結晶化層中の酸素濃度は〜1019［cm-3］程度
であるため、上記の結晶粒界発生に関する考案は
正当なものと言える。なお、第４図中４１は単結
晶シリコン基板、４２はSiO2絶縁膜、４３は多
結晶シリコン膜、４４はSiO2保護膜、４５は単
結晶化部、４６は溶融部を示している。 The cause of this problem is, as shown in Figure 4, when the silicon film is in a molten state, part of the SiO 2 film adjacent above and below it melts, increasing the oxygen concentration in the molten silicon and increasing the concentration of oxygen in the silicon. Since the solid solution limit concentration is exceeded, precipitates are generated when silicon recrystallizes, which is thought to lead to the generation of grain boundaries. The solid solubility limit of oxygen in solid silicon just below the melting point is 1.5 to 3×10 18 [cm -3 ], which is
Since the oxygen concentration in the SOI recrystallized layer is about 10 19 [cm -3 ], the above idea regarding the generation of grain boundaries can be said to be valid. In FIG. 4, reference numeral 41 indicates a single crystal silicon substrate, 42 a SiO 2 insulating film, 43 a polycrystalline silicon film, 44 a SiO 2 protective film, 45 a single crystallized portion, and 46 a molten portion.
上記の問題を解決する方法として、保護用の
SiO2膜の一部を開孔させる手法が提案されてい
る。これは、溶融したシリコン層中に含まれてい
る過剰な酸素原子がシリコン原子と結合した一酸
化シリコン（SiO）の形で、上記開孔部から蒸発
する現象を利用するものである。この方法によれ
ば、SOI再結晶化層の酸素濃度を低減化でき、れ
により結晶欠陥の少ないSOI膜の形成が可能であ
る。しかしながら、この方法では保護膜が連続し
ていないために、得られるSOI膜の表面平坦性に
問題があり、高密度集積回路素子を形成すること
は困難である。 As a way to solve the above problem, a protective
A method has been proposed in which holes are formed in a portion of the SiO 2 film. This utilizes the phenomenon in which excess oxygen atoms contained in the molten silicon layer evaporate from the opening in the form of silicon monoxide (SiO) bonded to silicon atoms. According to this method, the oxygen concentration in the SOI recrystallized layer can be reduced, thereby making it possible to form an SOI film with fewer crystal defects. However, since the protective film is not continuous in this method, there is a problem with the surface flatness of the resulting SOI film, making it difficult to form high-density integrated circuit elements.
（発明が解決しようとする問題点）
このように従来方法では、シリコンの再結晶化
過程における溶融シリコン中の酸素濃度の増大を
避けることができず、結晶粒界発生を招き、良質
のシリコン単結晶層を製造することは困難であつ
た。また、保護膜の一部を開口すると、最終的に
得られるSOI膜の表面平坦性が低下する等の問題
があつた。(Problems to be solved by the invention) As described above, in the conventional method, it is impossible to avoid an increase in the oxygen concentration in molten silicon during the recrystallization process of silicon, which leads to the generation of grain boundaries, which leads to the formation of high-quality silicon monomers. It was difficult to produce crystalline layers. Furthermore, when a portion of the protective film is opened, there are problems such as a decrease in the surface flatness of the SOI film finally obtained.
本発明は上記事情を考慮してなされたもので、
その目的とするところは、シリコンの再結晶化過
程における溶融シリコン中での酸素濃度の低減を
はかることができ、絶縁膜上に結晶欠陥の少ない
高品質のシリコン単結晶層を形成することのでき
る半導体単結晶層の製造方法を提供することにあ
る。 The present invention was made in consideration of the above circumstances, and
The purpose of this is to reduce the oxygen concentration in molten silicon during the silicon recrystallization process, and to form a high-quality silicon single crystal layer with few crystal defects on the insulating film. An object of the present invention is to provide a method for manufacturing a semiconductor single crystal layer.
［発明の構成］
（問題点を解決するための手段）
本発明の骨子は、SOI膜の表面保護膜に、酸素
原子や酸化シリコン分子に対し透過性に富む物質
を用いることにより、シリコンの再結晶化過程で
シリコン中の過剰な酸素を外方拡散させ、SOI再
結晶化層の酸素濃度を低減化し、従来技術での過
剰酸素に起因した転位、双晶、積層欠陥、結晶粒
界等の結晶欠陥の発生を抑制することにある。さ
らに、上記酸素原子や酸化シリコン分子に対し透
過性に富む物質として、多孔質の薄膜を用いるこ
とにある。[Structure of the Invention] (Means for Solving the Problems) The gist of the present invention is to recycle silicon by using a material highly permeable to oxygen atoms and silicon oxide molecules for the surface protection film of the SOI film. Excess oxygen in silicon is diffused outward during the crystallization process, reducing the oxygen concentration in the SOI recrystallized layer, and eliminating dislocations, twins, stacking faults, grain boundaries, etc. caused by excess oxygen in conventional technology. The purpose is to suppress the occurrence of crystal defects. Furthermore, a porous thin film is used as the substance highly permeable to the oxygen atoms and silicon oxide molecules.
即ち本発明は、半導体基板上に形成された絶縁
膜上に半導体単結晶層を製造する方法において、
前記絶縁膜上に非晶質若しくは多結晶の半導体薄
膜を形成したのち、この半導体薄膜上に多孔質薄
膜からなる保護膜を形成し、次いで前記半導体薄
膜をアニールして溶融・再結晶化するようにした
方法である。 That is, the present invention provides a method for manufacturing a semiconductor single crystal layer on an insulating film formed on a semiconductor substrate, comprising:
After forming an amorphous or polycrystalline semiconductor thin film on the insulating film, a protective film made of a porous thin film is formed on the semiconductor thin film, and then the semiconductor thin film is annealed to melt and recrystallize it. This is the method I used.
（作用）
上記の方法であれば、シリコンの溶融・再結晶
化過程で、シリコン層に接するSiO2等の絶縁膜
からシリコン中の溶出する過剰な酸素を、保護膜
を通して外方に移動させることができる。従つ
て、シリコン中の酸素濃度を、シリコンの固溶限
以内に低減することが可能となる。その結果、従
来技術における、SOI層中の過剰な酸素の析出に
起因した結晶欠陥の発生を抑制することが可能と
なる。(Function) With the above method, during the silicon melting/recrystallization process, excess oxygen eluted from the silicon from the insulating film such as SiO 2 that is in contact with the silicon layer is moved outward through the protective film. I can do it. Therefore, it is possible to reduce the oxygen concentration in silicon to within the solid solubility limit of silicon. As a result, it becomes possible to suppress the occurrence of crystal defects caused by excessive precipitation of oxygen in the SOI layer in the prior art.
（実施例）
以下、本発明の詳細を図示の実施例によつて説
明する。(Example) Hereinafter, the details of the present invention will be explained by referring to the illustrated example.
第１図ａ〜ｃは本発明の第１の実施例に係わる
シリコン単結晶層の製造工程を示す断面図であ
る。まず、第１図ａに示す如く、（100）方位の単
結晶シリコン基板１１上にCVD法により厚さ1.5
［μm］のSiO2膜（絶縁膜）１２を堆積し、その
上にSiH4の熱分解を用いたCVD法により厚さ0.6
［μm］の多結晶シリコン膜（半導体薄膜）１３を
堆積する。 FIGS. 1a to 1c are cross-sectional views showing the manufacturing process of a silicon single crystal layer according to a first embodiment of the present invention. First, as shown in FIG.
[μm] SiO 2 film (insulating film) 12 is deposited, and a thickness of 0.6 is deposited on it by CVD method using thermal decomposition of SiH 4 .
A polycrystalline silicon film (semiconductor thin film) 13 of [μm] is deposited.
次いで、第１図ｂに示す如く、多結晶シリコン
膜１３上で保護膜としての多孔質シリコン酸化膜
１４を被着する。ここで、多孔質シリコン酸化膜
１４は、酸素原子、酸素分子及び酸化シリコン分
子等よりも大きな孔を多数含んでいるため、これ
らが容易に該被膜中を拡散できると共に、溶融し
たシリコンの液滴に比較すると被膜に含まれる孔
は十分に小さいので、SOI層の溶融・再結晶化過
程において、十分な性能の表面保護膜として機能
するものである。 Next, as shown in FIG. 1b, a porous silicon oxide film 14 as a protective film is deposited on the polycrystalline silicon film 13. Here, since the porous silicon oxide film 14 includes many pores larger than oxygen atoms, oxygen molecules, silicon oxide molecules, etc., these can easily diffuse through the film, and the molten silicon droplets Since the pores contained in the film are sufficiently small compared to the above, it functions as a surface protective film with sufficient performance during the melting and recrystallization process of the SOI layer.
なお、上記多孔質シリコン酸化膜１４の形成に
は、例えばSiH4及びO2の混合ガスのマイクロ波
放電による気相反応を用いた。マイクロ波導波管
端部の空洞共振器を放電チヤンバとし、試料をそ
の中に設置した。堆積条件は、SiH4ガス流量100
［cc／min］、O2ガス流量100［cc／min］、チヤン
バ内圧力１［torr］、マイクロ波（2.45GHz）電力
500［Ｗ］とした。堆積速度は〜150（Å／sec］と
高速のため、多孔質性のシリコン酸化膜が形成さ
れる。本実施例では、40秒間の堆積により〜0.6
［μm］厚の多孔質シリコン酸化膜を形成した。 The porous silicon oxide film 14 was formed using a gas phase reaction using, for example, microwave discharge of a mixed gas of SiH 4 and O 2 . A cavity resonator at the end of the microwave waveguide was used as a discharge chamber, and the sample was placed inside it. Deposition conditions are SiH 4 gas flow rate 100
[cc/min], O 2 gas flow rate 100 [cc/min], chamber pressure 1 [torr], microwave (2.45GHz) power
It was set to 500 [W]. Since the deposition rate is as high as ~150 (Å/sec), a porous silicon oxide film is formed. In this example, the deposition rate is ~0.6
A porous silicon oxide film with a thickness of [μm] was formed.
以上の手順で作成した試料を、第１図ｃに示す
如く、電子ビーム１５の走査によりビームアニー
ルした。即ち、走査型電子ビームアニールによ
り、多結晶シリコン膜１３を順次溶融・再結晶化
させた。ここで、電子ビームは３６［ＭHz］の振
幅変調した正弦波により、半値幅約150［μm］の
スポツトビームを一方向に高速偏向することによ
り、長さ約５［mm］に疑似的に線状化したものを
用いた。振幅変調には、周波数10［ＫHz］で線状
化ビームの長さ方向強度分布を均一化するため
に、計算機制御された波形を持つ変調波を用い
た。 The sample prepared by the above procedure was beam annealed by scanning with an electron beam 15, as shown in FIG. 1c. That is, the polycrystalline silicon film 13 was sequentially melted and recrystallized by scanning electron beam annealing. Here, the electron beam is formed into a pseudo line with a length of about 5 [mm] by rapidly deflecting a spot beam with a half-width of about 150 [μm] in one direction using a 36 [MHz] amplitude-modulated sine wave. We used the one that had been transformed into a For amplitude modulation, a modulated wave with a computer-controlled waveform was used to equalize the longitudinal intensity distribution of the linearized beam at a frequency of 10 KHz.
この線状化ビームを線状方向と直角な方向に走
査した。走査速度は100［mm／sec］、ビーム加速電
圧は12［KV］、ビーム電流は9.5［mA］とした。
この結果得られたSOI層は、従来技術に比べ格段
に結晶粒界の少ないものである。従来技術では略
走査方向と平行に平均間隔10［μm］の結晶粒界が
多数存在するが、本実施例では平均間隔が200
［μm］となり、均一な単結晶領域の面積が飛躍的
に増大した。この結果は、再結晶化過程におい
て、溶融したSOI層中の過剰な酸素が多孔質シリ
コン酸化膜１４中を、無数の微細な孔を通つて高
速に拡散し、表面から蒸発するこにより、SOI層
中の酸素濃度が大幅に低減されたことに基づくも
のと考えられる。 This linear beam was scanned in a direction perpendicular to the linear direction. The scanning speed was 100 [mm/sec], the beam acceleration voltage was 12 [KV], and the beam current was 9.5 [mA].
The resulting SOI layer has significantly fewer grain boundaries than conventional techniques. In the conventional technology, there are many grain boundaries approximately parallel to the scanning direction with an average spacing of 10 [μm], but in this example, the average spacing is 200 [μm].
[μm], and the area of the uniform single crystal region increased dramatically. This result shows that during the recrystallization process, excess oxygen in the molten SOI layer diffuses at high speed through countless fine pores in the porous silicon oxide film 14 and evaporates from the surface, causing SOI This is thought to be due to a significant reduction in the oxygen concentration in the layer.
かくして本実施例方法によれば、多結晶シリコ
ン膜１３上に保護膜としての多孔質シリコン酸化
膜１４を堆積しておくことにより、ビームアニー
ルの際に溶融シリコン中の酸素を外方に逃がすこ
とができ、シリコン中の酸素濃度をシリコンの固
溶限以下に低減させることができる。このため、
結晶粒界発生を抑制することができ、結晶欠陥の
少ない良質のシリコン単結晶層を形成することが
できる。また、保護膜としての多孔質シリコン酸
化膜１４は連続した状態であるので、形成される
SOI膜の表面平坦性は良好なものとなる。 Thus, according to the method of this embodiment, by depositing the porous silicon oxide film 14 as a protective film on the polycrystalline silicon film 13, oxygen in the molten silicon can escape to the outside during beam annealing. It is possible to reduce the oxygen concentration in silicon to below the solid solubility limit of silicon. For this reason,
Generation of grain boundaries can be suppressed, and a high-quality silicon single crystal layer with few crystal defects can be formed. Moreover, since the porous silicon oxide film 14 as a protective film is in a continuous state, it is not formed.
The surface flatness of the SOI film becomes good.
次に、本発明の第２の実施例方法について説明
する。この実施例が先に説明した実施例と異なる
点は、第２図に示す如くビームアニールする前の
試料構造にある。即ち、この実施例で用いた試料
は、先の実施例で用いた試料の上部にCVD法に
より、厚さ0.1［μm］の多結晶シリコン膜１６を
堆積させたものである。 Next, a second embodiment method of the present invention will be described. This embodiment differs from the previously described embodiments in the structure of the sample before beam annealing, as shown in FIG. That is, the sample used in this example was obtained by depositing a polycrystalline silicon film 16 with a thickness of 0.1 [μm] on top of the sample used in the previous example by CVD.
この試料を先の実施例と同様に、走査型電子ビ
ームアニールにより、SOI層を溶融・再結晶化さ
せた。この結果得られたSOI層では、結晶粒界の
発生は極めて少なく、結晶粒界の間隔は１〜３
［mm］と広く、部分的には〜５［mm］間隔の領域も
存在する。このような大面積の単結晶層は、そこ
に半導体素子を形成する上で有効なものである。 As in the previous example, this sample was subjected to scanning electron beam annealing to melt and recrystallize the SOI layer. In the SOI layer obtained as a result, the occurrence of grain boundaries is extremely small, and the interval between grain boundaries is 1 to 3.
It is as wide as [mm], and there are some areas with intervals of ~5 [mm]. Such a large-area single crystal layer is effective for forming semiconductor elements therein.
この優れた結果は、再結晶化過程において、溶
融したSOI層中の過剰な酸素が多孔質シリコン酸
化膜１４中を拡散し、表面の多結晶シリコン膜１
６のシリコン原子と反応してSiO2層を形成する
ことにより、SOI層中の酸素濃度がシリコン中の
酸素の固溶限よりも大幅に低いものとなり、結晶
粒界発生が完全に抑制されたためと考えられる。 This excellent result is due to the fact that during the recrystallization process, excess oxygen in the melted SOI layer diffuses into the porous silicon oxide film 14, and the polycrystalline silicon film 14 on the surface
By reacting with the silicon atoms of 6 to form a SiO2 layer, the oxygen concentration in the SOI layer was significantly lower than the solid solubility limit of oxygen in silicon, and the generation of grain boundaries was completely suppressed. it is conceivable that.
次に、本発明の第３の実施例方法について説明
する。この実施例では、試料として第３図に示す
構造のものを用いた。即ち、（100）面方位の単結
晶シリコン基板１１上にCVD法により厚さ２
［μm］のSiO2膜１２を堆積し、通常のフオトエ
ツチング法により幅２［μm］のシード部とすべき
開口部１７を形成し、次いでSiH4の熱分解を用
いたCVD法により全面に厚さ0.6［μm］の多結晶
シリコン膜１３を堆積する。さらに、その上に第
２の実施例と同様に、多孔質シリコン酸化膜１４
及び多結晶シリコン膜１６を順次堆積させたもの
である。 Next, a third embodiment method of the present invention will be described. In this example, the structure shown in FIG. 3 was used as a sample. That is, a film with a thickness of 2 is deposited on a single crystal silicon substrate 11 with (100) plane orientation by the CVD method.
[μm] SiO 2 film 12 is deposited, an opening 17 with a width of 2 [μm] to be used as a seed portion is formed by a normal photoetching method, and then the entire surface is deposited by a CVD method using thermal decomposition of SiH 4 . A polycrystalline silicon film 13 having a thickness of 0.6 [μm] is deposited. Further, a porous silicon oxide film 14 is formed thereon as in the second embodiment.
and a polycrystalline silicon film 16 are sequentially deposited.
この試料を、走査型電子ビームアニールによ
り、SOI層を溶融・再結晶化させた。この結果得
られたSOI層は、シード部を通じて横方向エピタ
キシヤル成長しているため、基板シリコンと同一
方位の単結晶となつている。そして、結晶粒界の
発生は殆どみられず、５［mm□］パターンのシー
ドで囲まれた領域が結晶粒界の内完全単結晶層と
して得られた。 This sample was subjected to scanning electron beam annealing to melt and recrystallize the SOI layer. The resulting SOI layer is epitaxially grown in the lateral direction through the seed portion, so it is a single crystal with the same orientation as the silicon substrate. Almost no grain boundaries were observed, and a region surrounded by seeds in a 5 [mm□] pattern was obtained as a complete single crystal layer within the grain boundaries.
なお、本発明は上述した各実施例方法に限定さ
れるものではない。例えば、SOIの上部に被着す
る表面保護膜としては、多孔質シリコン酸化膜に
限らず、多孔質薄膜であればよい。多孔質薄膜と
しては、多孔質シリコン酸化膜の他に、酸素をん
だ多孔質シリコン膜、多孔質アルミナ膜、多孔質
イツトリア、多孔質ジルコニア、多孔質ハフニウ
ム酸化膜、或いはこれらの混合物等を用いること
ができる。また、これらの多孔質薄膜の形成に
は、マイクロ波放電を利用した気相反応に限ら
ず、スパツタリング法、真空蒸着法、陽極酸化法
等を用いることが可能である。 Note that the present invention is not limited to the methods of each embodiment described above. For example, the surface protection film deposited on the top of the SOI is not limited to a porous silicon oxide film, but may be any porous thin film. As the porous thin film, in addition to the porous silicon oxide film, an oxygen-containing porous silicon film, a porous alumina film, a porous yttoria, a porous zirconia, a porous hafnium oxide film, or a mixture thereof is used. be able to. In addition, the formation of these porous thin films is not limited to gas phase reaction using microwave discharge, but may also include sputtering, vacuum evaporation, anodic oxidation, and the like.
また、多孔質薄膜の上部に設ける酸素吸収層の
材料は、必ずしも多結晶シリコンである必要はな
く、非晶質シリコン、ゲルマニウム、GaAs，
GaP等の半導体やSn，Ti，Hf，Nb，Fe，Cu，
In，Sb，Ni，Pd，Al等の金属でもよい。また、
SOI層の溶融・再結晶化には、走査型電子ビーム
アニール法を用いたが、他のパルス電子ビームア
ニール法、レーザビーム、ユール法、ストリツプ
ヒータやランプ加熱等を用いたゾーンメルテイン
グ法（ZMR法）等を用いても同様の効果が得ら
れる。また、半導体薄膜としては、多結晶シリコ
ンの代りに、非晶質シリコンを用いることがで
き、さらに他の半導体材料を用いることも可能で
ある。その他、本発明の要旨を逸脱しない範囲
で、種々変形して実施することができる。 In addition, the material of the oxygen absorption layer provided on the top of the porous thin film does not necessarily have to be polycrystalline silicon, but may include amorphous silicon, germanium, GaAs, etc.
Semiconductors such as GaP, Sn, Ti, Hf, Nb, Fe, Cu,
Metals such as In, Sb, Ni, Pd, and Al may also be used. Also,
A scanning electron beam annealing method was used to melt and recrystallize the SOI layer, but other pulsed electron beam annealing methods, laser beams, Yule methods, zone melting methods (ZMR) using strip heaters, lamp heating, etc. Similar effects can be obtained by using methods such as Furthermore, as the semiconductor thin film, amorphous silicon can be used instead of polycrystalline silicon, and furthermore, other semiconductor materials can also be used. In addition, various modifications can be made without departing from the gist of the present invention.
［発明の効果］
以上詳述したように本発明によれば、シリコン
の溶融・再結晶化過程における溶融シリコン中の
過剰な酸素を保護膜を通して拡散させることがで
き、過剰酸素に起因する各種結晶欠陥を未然に防
止することができる。従つて、絶縁膜上に結晶欠
陥の少ない良質の半導体単結晶層を形成すること
ができる。[Effects of the Invention] As detailed above, according to the present invention, excess oxygen in molten silicon during the silicon melting/recrystallization process can be diffused through the protective film, and various crystals caused by excess oxygen can be diffused. Defects can be prevented. Therefore, a high quality semiconductor single crystal layer with few crystal defects can be formed on the insulating film.
第１図ａ〜ｃは本発明の第１の実施例方法に係
わるシリコン単結晶層の製造工程を示す断面図、
第２図は本発明の第２の実施例方法に用いた試料
構造を示す断面図、第３図は本発明の第３の実施
例方法に用いた試料構造を示す断面図、第４図は
従来の問題点を説明するための模式図である。
１１……単結晶シリコン基板、１２……SiO2
膜（絶縁膜）、１３……多結晶シリコン膜（半導
体薄膜）、１４……多孔質シリコン酸化膜（保護
膜）、１５……電子ビーム、１６……多結晶シリ
コン膜、１７……開口部。
1a to 1c are cross-sectional views showing the manufacturing process of a silicon single crystal layer according to the first embodiment method of the present invention,
FIG. 2 is a sectional view showing the sample structure used in the second embodiment method of the present invention, FIG. 3 is a sectional view showing the sample structure used in the third embodiment method of the present invention, and FIG. It is a schematic diagram for explaining the conventional problem. 11... Single crystal silicon substrate, 12... SiO 2
Film (insulating film), 13... Polycrystalline silicon film (semiconductor thin film), 14... Porous silicon oxide film (protective film), 15... Electron beam, 16... Polycrystalline silicon film, 17... Opening .
Claims (1)
単結晶層を製造する方法において、前記絶縁膜上
に非晶質若しくは他結晶の半導体薄膜を形成する
工程と、上記半導体薄膜上に多孔質薄膜からなる
保護膜を形成する工程と、次いで前記半導体薄膜
をアニールして溶融・再結晶化する工程とを含む
ことを特徴とする半導体単結晶層の製造方法。 ２ 前記保護膜として、多孔質シリコン酸化膜を
用いたことを特徴とする特許請求の範囲第１項記
載の半導体単結晶層の製造方法。 ３ 前記保護膜として、酸素を含む多孔質シリコ
ン膜、多孔質アルミナ膜、多孔質ジルコニア膜、
多孔質イツトリア膜、或いは多孔質ハフニウム酸
化膜、またはこれらの混合物を用いたことを特徴
とする特許請求の範囲第１項記載の半導体単結晶
層の製造方法。 ４ 前記半導体薄膜をアニールする前に、前記保
護膜の上に半導体層及び金属層の少なくとも一方
を被着することを特徴とする特許請求の範囲第１
項、第２項又は第３項記載の半導体単結晶層の製
造方法。 ５ 前記保護膜の形成工程として、マイクロ波放
電を利用した気相反応を用いたことを特徴とする
特許請求の範囲第１項記載の半導体単結晶層の製
造方法。 ６ 前記半導体薄膜をアニールする工程として、
電子ビーム或いはレーザビームを用いたことを特
徴とする特許請求の範囲第１項記載の半導体単結
晶層の製造方法。[Scope of Claims] 1. A method for manufacturing a semiconductor single crystal layer on an insulating film formed on a semiconductor substrate, comprising: forming an amorphous or other crystalline semiconductor thin film on the insulating film; A method for manufacturing a semiconductor single crystal layer, comprising the steps of forming a protective film made of a porous thin film on a thin film, and then annealing the semiconductor thin film to melt and recrystallize it. 2. The method of manufacturing a semiconductor single crystal layer according to claim 1, wherein a porous silicon oxide film is used as the protective film. 3 As the protective film, a porous silicon film containing oxygen, a porous alumina film, a porous zirconia film,
2. The method of manufacturing a semiconductor single crystal layer according to claim 1, wherein a porous yttoria film, a porous hafnium oxide film, or a mixture thereof is used. 4. Claim 1, characterized in that before annealing the semiconductor thin film, at least one of a semiconductor layer and a metal layer is deposited on the protective film.
A method for manufacturing a semiconductor single crystal layer according to item 1, 2 or 3. 5. The method for manufacturing a semiconductor single crystal layer according to claim 1, characterized in that the step of forming the protective film uses a gas phase reaction using microwave discharge. 6. As the step of annealing the semiconductor thin film,
The method for manufacturing a semiconductor single crystal layer according to claim 1, characterized in that an electron beam or a laser beam is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61227187A JPS6384014A (en) | 1986-09-27 | 1986-09-27 | Manufacture of semiconductor single crystal layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61227187A JPS6384014A (en) | 1986-09-27 | 1986-09-27 | Manufacture of semiconductor single crystal layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6384014A JPS6384014A (en) | 1988-04-14 |
| JPH0517693B2 true JPH0517693B2 (en) | 1993-03-09 |
Family
ID=16856852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61227187A Granted JPS6384014A (en) | 1986-09-27 | 1986-09-27 | Manufacture of semiconductor single crystal layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6384014A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4915772A (en) * | 1986-10-01 | 1990-04-10 | Corning Incorporated | Capping layer for recrystallization process |
| US5123975A (en) * | 1989-03-28 | 1992-06-23 | Ricoh Company, Ltd. | Single crystal silicon substrate |
| JP3416163B2 (en) * | 1992-01-31 | 2003-06-16 | キヤノン株式会社 | Semiconductor substrate and manufacturing method thereof |
| AT513692B1 (en) * | 2012-12-10 | 2020-10-15 | Tgw Logistics Group Gmbh | Sorting system and method for sorting objects in a conveyor system |
-
1986
- 1986-09-27 JP JP61227187A patent/JPS6384014A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6384014A (en) | 1988-04-14 |
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