JPS6370832A - liquid crystal display device - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to the structure of an active matrix panel.

[Conventional technology]

The structure of the +1x panel is as follows: “Nikkei Electronics September 10, 1984 issue 351P,
211 to 2401.

FIG. 2 is an example of a plan view of a pixel portion of an active matrix panel. The channel portion and source/drain electrodes of the TFT are formed of a thin film of polysilicon or amorphous silicon.

24-layer thin film made of polysilicon or metal
- form electrodes and scanning lines. 26 is pixel Kl!
, 27 data lines.

[Problems that the invention aims to solve]

However, the dual-speed conventional technology causes the following problems. First, the first problem is that since the voltage applied to the liquid crystal depends on the time constant of the liquid crystal itself, when the temperature changes, the time constant of the liquid crystal changes and the display state also changes. Particularly at high temperatures, the resistance of the liquid crystal decreases and the time constant decreases, resulting in a decrease in contrast ratio. The second problem is that since the liquid crystal needs to be driven by a tributary current, the video signal is usually inverted with alternating current, but the writing and holding states of the TFT also differ depending on the polarity of this signal.
Voltage b applied to the liquid crystal has an asymmetrical change and causes flicker.

The present invention is intended to solve these problems, and its purpose is to provide an active matrix panel structure that does not reduce the contrast ratio hi even at high temperatures and has less flicker.

Preparatory Measures to Solve Problem C] The active matrix panel of the present invention has the same conductive film as the channel part of the TFT disposed above and below the scanning line in the previous stage with a gate insulating film interposed therebetween. It is characterized in that the conductive film is connected to the pixel electrode.

[Effect]

According to the above structure of the present invention, since the capacitance of the gate insulating film is added in parallel with the capacitance of the liquid crystal, the time constant h of the liquid crystal
;The contrast ratio increases because it becomes longer. Further, even if the temperature rises and the time constant of the liquid crystal decreases, the capacitance of the gate insulating film does not change, so it is possible to suppress a decrease in contrast ratio. Furthermore, flicker is reduced due to the asymmetric operation of TlPT writing and holding caused by the difference in polarity of the video signal.

[Example 1] The first review is a plan view of an active mud panel and a risk panel showing one implementation of the present invention, and FIGS. !-, D&. The manufacturing process will be explained using this figure. First, a thin film 2 of polysilicon or amorphous silicon is deposited on an insulating substrate 1 and patterned as shown in the figure. The thin film serves as the channel part and source/drain electrodes of 'rlFT, as well as detailed electrodes for creating capacitance.
Next, a gate insulating film 3 is formed, and a scanning line 4 which also serves as a gate charge amount is formed thereon. Is the material polysilicon T? In the case of T, polysilicon or a high melting point metal is used, and in the case of amorphous silicon TIFT, a normal metal or a transparent conductive material is used. An interlayer insulation film 5 is deposited on this, and a contact hole is opened for one pixel electrode 6.
The substrate forming the data line 7 and the data line 7 is an active matrix substrate. This substrate is opposed to another substrate having a common electrode via a space of several μm, and a liquid crystal is sealed in this space to form the next BZ active matrix panel.

FIG. 3 shows the gate voltage dependence of an N-type MO8,000 capacitor. Gate voltage 7G is threshold voltage v
When the voltage exceeds th, the capacitance increases to Q6, and below the threshold voltage t, the capacitance becomes an overlapping capacitance a gso . Therefore v
It is desirable to use an MO8 capacitor in the range of O>vth, but in this embodiment, the MOEi capacitor built under the scanning line 4 in the previous stage in FIG. 1 (6) is of the same conductivity type as TFl. Yes 1 For example, in the case of N type, in the normal state where the TFT is 0FIP, Kla<Vth, so the capacitance is KOgllO. However, since the thickness of the gate film is sufficiently thin relative to the space in which the liquid crystal is sealed, the capacitance bt of the unit direct product becomes large, resulting in the overlapping capacitance a gs of the pattern as shown in FIG. 1 b) K.

Even with the input voltage, the capacity becomes 30 to 50% of the capacity of the liquid crystal driven by the one pixel electrode 9@6. Since this MOB capacitor is added in parallel with the capacitance of the liquid crystal, the time constant of the liquid crystal appears to increase, and the display performance is greatly improved. This will be explained using FIG. 4. This figure is a diagram showing the potential of each part of the active matrix panel, with time on the horizontal axis and potential on the vertical axis. As is well known, the NTBC video signal consists of 17 frames made up of two interlaced fields, ie, an odd field and an even field, to complete one 8-frame. Since the liquid crystal must be driven with alternating current, the signal on the data line is inverted with alternating current as in 42.

This is a signal for 41 scanning lines, and such a pulse is required when driving an N-channel TFT. Numbers 44 and 45 are the electric currents of the pixel electrodes in the conventional example and the embodiment of the present invention, respectively, and number 43 is the potential of the common electrode. The potential difference between this common electrode and the pixel electrode is the voltage applied to the liquid crystal. Time t.

Assuming that fJv et al. is an odd field %t, and t6 is an even field, first, in the odd field, at time t, T F T hZ ON L, the data line signal is written to the pixel electrode, and at time t8, the TFT When becomes 0IFF, the pixel electrode potential discharges toward the common electrode potential with a certain time constant. Similarly, in the even field, TF'J' is turned on at time t4 and the data line signal b is written to one pixel electrode, and when TIFT is turned off at time t, the pixel electrode potential is discharged toward the common electrode potential. I will do it. The shaded part is the voltage applied to the liquid crystal in this embodiment, and it can be seen that a larger voltage can be applied because the time constant is longer than in the conventional example. This increases the contrast ratio. By placing the wiring between the FT1M0B image and the drain electrode of the TFT between the data line and the pixel electrode as in the first review, it also serves to block light leaking from this wire. Therefore, the contrast ratio is increased and the sharpness of one image is improved. Furthermore, even if the time constant of the liquid crystal changes somewhat with respect to temperature changes, the additional 7tMOE+capacitance does not change, so the area of the shaded portion in FIG. 3 does not change much.

That is, a display screen with good reproducibility can be obtained over a wide temperature range. Moreover, Frivkar also has 3 points compared to the conventional example.
Applicant's experiments have confirmed that the ratio decreases by ~5d'B.

This makes the TIPT less susceptible to asymmetric operation in writing and retaining in odd and even fields.

[Example 2] Fig. 5b) is a plan view of an active matrix panel in a second embodiment of the present invention, and φ) and (6) in the same figure are
are sectional views taken along the lines -B and OD in the same figure, respectively. This active matrix panel can be manufactured in exactly the same factory as the first embodiment. 61
~67 numbers correspond to numbers 1 to 7 in Figure 1, respectively, and 61
62 is an insulating substrate, 62 is a polysilicon film, 6 is an amorphous silicon thin film, 63 is a gate insulating film, 64 is a scanning line, 6
5 is an insulating film between the eyebrows, 66 pixel electrodes, and 67 data lines. In the case of a transmission type, a transparent conductive film is used for the pixel electrode 66, and a thin metal film is used for the data line 67, which is the same transparent conductive film as the pixel electrode.

In this embodiment, as in the first embodiment, an MO8 capacitor of the same conductivity type as the TIFT is built under the scanning line 64 in the previous stage, so in the normal state of T F T hs 0FIP, there is an overlap capacitance. Only Hz is valid.

However, in one embodiment, the scan line 64 is
It has a shape that extends parallel to the data line as shown in the figure above, and an MO8 capacitor can also be built into this part. can. Therefore, it is possible to obtain a high quality display screen with a larger contrast ratio and less flicker over a wider temperature range.

Moreover, by building a KMO8 capacitor to cover the gap between the pixel electrode and the data line as shown in Figure 4-μ), light leaking through this gap can be blocked.1. ″: Contributes to an increase in the intra-intrast ratio.

[Example 3] FIG. 6 Ca) is a plan view of a 7-cut tape matrix panel according to the third embodiment of the present invention, and FIG.
) are sectional views taken along AB and OD of the upper part of the figure, respectively. This embodiment differs from the first and second embodiments in that an MO8 capacitor with a conductivity different from TIF'E' is created. For example, it is effective for a matrix panel with a 0M0a type driver installed internally.

The structure of the active matrix panel of this example will be explained using FIG. First, polysilicon or amorphous silicon thin films 82 and 88 are deposited on an insulating substrate 81 and patterned as shown in the figure. This becomes the channel part and source/drain electrode of 82 TFTs, and 88 is the MO
It serves as a precautionary electrode to build up daily capacity. Next, a gate insulating film 83 is formed, and a scanning line 84 that also serves as a gate electrode is formed thereon.
form. After that, selective ion implantation is performed, 82
is an N-channel T'FT, and 88 is a P-channel MO8.
#Yapashita. The subsequent steps are the same as in Example 1.
There are 5 glabellar insulation films, 86 pixel electrodes, and 87 data lines.

In this embodiment, the conductivity m ht a of #-1tT'FT and Motif capacitance is used. P channel MOBJ?
The gate voltage dependence of the + pacitor is symmetrical to that of the N channel shown in Figure 3, and is yo (Co, Wa at Vt).
V t becomes a gso. Therefore, the OF of TFT
In the normal state of F, since vo<VtPL-t', the overlapping specific area of the electrode 88 and the scan@84 all acts as a capacitance electrode, and the original MO daily volume fco is added. This capacitance of 1 is about 100 to 200 inches of the capacitance of the liquid crystal driven by the pixel electrode 86, which is much larger than that of the first and second embodiments. Therefore, the effect becomes greater. 9. During the period when the previous scanning line is selected, the MO daily capacity is OFF and the overlap capacity is 0g5.
As a friend of o, the waveform of the scanning line is not blunted, and the driving state does not change due to the addition of capacitance.

〔Effect of the invention〕

As stated above, the active matrix panel according to the present invention allows capacitance to be built into pixels without increasing the number of steps. By adding capacitance, the contrast ratio increases, flicker decreases, and a screen with good reproducibility can be obtained over a wide training range. This also has the effect of suppressing crosstalk due to the capacitive coupling of the data line and pixel electrode, and suppressing the number of pixels in one screen, improving the overall image quality.

[Brief explanation of the drawing]

FIG. 1(α) is a plan view showing the structure of a cut-tape matrix panel, and FIG. 1) and (c) are side views thereof. FIG. 2 is a plan view showing the structure of a conventional seven-tape matrix panel. FIG. 3 is a diagram showing the dependence of N-channel MO8 capacitance on gate voltage. FIG. 4 is a diagram showing the potential of each part of the 7-cut tape matrix panel. Figure 5 (b), Figure 6) show the structure of the active matrix panel, Figure 5 (6), (c), 6
L(c) in the figure is a cross-sectional view. 2.62.82...Polysilicon or amorphous silicon thin film 3.63.85...Gate insulating film 4.64
．． 84......Scanning line control Seiko Epson Co., Ltd. (b) Figure 5 (bi) (c) Figure 6 of d

Claims (4)

[Claims] (1) A pixel electrode is driven by a scanning line group, a data line group, and a thin film transistor (hereinafter abbreviated as TFT) array provided at the fulcrum of the scanning line and data line, which are provided on an insulating substrate, and the pixel electrode is driven. In an active matrix panel in which a liquid crystal is driven by an electric field between an electrode and a counter electrode, a T is provided above or below the scanning line in front of the pixel electrode.
An active matrix panel characterized in that a conductive film similar to that of a channel portion of an FT is disposed via a gate insulating film, and the conductive film is connected to the pixel electrode. (2) The active matrix panel according to claim 1, wherein the conductivity type of the conductive film is the same as that of the TFT. (3) The arrangement is such that a part of the gap between the data line and the pixel electrode is covered using a part of the conductive film or the scanning line. active matrix panel. (4) The active matrix panel according to claim 1, wherein the conductivity type of the conductive film is different from that of the TFT.