JPS6370576A - Thin-film transistor and manufacture thereof - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thin film transistor and a method for manufacturing the same, and more particularly to the formation of source and drain electrodes.

[Prior art and its problems]

Thin film transistors can be two-dimensionally integrated on an inexpensive large-area substrate such as glass to form an active matrix, and this can be combined with an optically active material such as liquid crystal to create a panel display. This is a device that has been attracting attention in recent years.

By the way, in thin film transistors using a polycrystalline silicon thin film as an active layer, undoped polycrystalline silicon is usually used in order to reduce the OFF current (Japanese Patent Application Laid-Open No.
No. 9-33877).

However, when non-doped polycrystalline silicon is used as the active layer, its own conductivity is 10-6Ω-1a.
-1 and amorphous silicon 10" A method has been proposed in which a contact forming layer is formed by implanting ions using a plantation method and then annealing.

However, both the thermal diffusion process and the annealing process in the ion implantation process are performed at, for example, 1200°C and 10°C, respectively.
In addition to requiring a high-temperature process of 00"C or higher, polycrystalline silicon has many grain boundaries, so diffusion occurs more easily at the grain boundaries, making it difficult to create fine structures, making it difficult to form p-n junctions like in single-crystal silicon. It was difficult to make.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a thin film transistor with a small OFF current and good device characteristics.

(Means for Solving the Problems) Therefore, in the present invention, in a thin film transistor using n-type or p-type doped polycrystalline silicon as an active layer, the source and drain electrodes are Schottky at the interface with the channel part. It is configured to include a transition metal silicide layer that forms a barrier.

Further, according to the method of the present invention, in manufacturing a thin film transistor, a silicide layer is formed on an n-type or p-type doped polycrystalline silicon layer as an active layer at an interface with the polycrystalline silicon layer. A transition metal layer that forms a barrier is formed, heat treated, and patterned into a desired shape to form source and drain electrodes containing a transition metal silicide layer.

[Effect]

According to the present invention, since the source/drain electrodes form a Schottky barrier at the interface with the channel part, the OFF
The current becomes extremely small, improving device characteristics.

Furthermore, according to the present invention, the formation of a transition metal silicide layer through an interfacial reaction between the transition metal and the surface of the silicon layer is performed at about 500°C at most, which is a lower temperature process than thermal diffusion or an annealing process after ion implantation. It will be a process. Furthermore, it is easier to miniaturize the element region compared to the case where an ohmic contact formation layer is formed by thermal diffusion or ion implantation.

Preferably, a p-type or n-doped polycrystalline silicon layer is formed, a gate insulating film is formed on this layer, a transition metal is deposited, and after heat treatment, the transition metal layer is selectively etched away to form a desired layer. It is preferable to pattern it in the shape of . As a result, no interfacial reaction occurs on the gate region due to the presence of the gate insulating layer, so self-alignment allows Schottky 1! between the channel region and the source/drain electrodes. ! 5 walls are formed. Further, by leaving the transition metal layer in a desired pattern shape, it becomes possible to simultaneously form source/drain electrodes and gate electrodes.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing the structure of a thin film transistor according to an embodiment of the present invention.

In this thin film transistor, the source and drain electrodes each have a two-layer structure of chromium silicide and chromium, and a Schottky barrier is formed at the interface with the active layer. A p-type polycrystalline silicon layer, a chromium layer as a gate electrode 4 formed on this layer via a silicon oxide film as a gate insulating WA3, and sources arranged on both sides of the gate electrode 4.・Drain electrodes 5, 6 and interlayer insulation v! and an aluminum layer as an inter-element wiring layer 8 disposed through a silicon oxide film as 7.

Here, the source/drain electrodes 5 and 6 are made of chromium silicide W5a and 6a, respectively, and a chromium layer 5b.

It has a two-layer structure with 6b.

Next, the manufacturing process of this thin film transistor will be explained.

First, as shown in FIG. 2(a), activated W! is applied onto a glass substrate 1 by low pressure CVD. A p-type polycrystalline silicon layer doped with boron (B) is deposited as J2.

Next, after patterning the polycrystalline silicon layer by the usual photolithography method, as shown in FIG. 2(b), CV
A silicon oxide film as the gate oxide film 3 is deposited using Da.

Furthermore, a chromium layer is deposited on this upper layer by sputtering as shown in FIG. Chromium silicide layers 5a', 5a' are formed at the interface. At this time, no chromium silicide layer is formed on the gate insulating film.

Thereafter, as shown in FIG. 2(d), the chromium layer is patterned using a conventional photolithography method to obtain a gate electrode 4 and source/drain electrodes 5.6. At this time, the gate electrode 4 is made of only a chromium layer, and the source/drain electrodes are made of chromium silicides 5a, 6a and chromium layers 5b, 6.
It consists of a two-layer structure with b.

Finally, as shown in FIG. 2(e), a silicon oxide film is formed as the insulating layer 7 by the CVD method, a contact hole h is formed, an aluminum layer is deposited by the sputtering method, and a photolithography process is performed. Element spacing 41 layers 8
A thin film transistor as shown in FIG. 1 is completed.

In the thin film transistor formed in this way, a Schottky barrier is formed at the interface between the source/drain electrode and the active layer, so the interface is clean, the OFF current is small, and the device characteristics are good. ing.

Furthermore, compared to conventional contact formation layers formed by thermal diffusion or ion implantation, this layer can be formed without going through a high-temperature process, and has good controllability, making it possible to miniaturize the device area.

Furthermore, the manufacturing process is greatly simplified and can be manufactured extremely easily and with good workability.

In addition, in the example, as shown in FIG. 2(d), the source
Although the drain K %l and the gate electrode are formed in the same process, they do not necessarily need to be formed in the same process and can be changed as appropriate. Alternatively, all of the transition metal layers except those that have become silicide layers may be removed, and another conductor layer may be newly formed.

In addition, in the example, a Cobrana type thin film transistor in which the gate electrode and the source/drain electrodes are on the same side with respect to the active layer has been described, but the application is not limited to the Cobrana type, but can also be applied to a staggered type thin film transistor. Needless to say, it is.

Furthermore, although chromium was used as the transition metal in the examples, it is not limited to chromium, and if the active layer is p-type polycrystalline silicon, molybdenum (Mo) may also be used.
, zirconium (Zr), tantalum (Ta), titanium (
If the active layer is made of n-type polycrystalline silicon, an appropriate material can be selected from platinum (Pt), palladium (Pd), and the like.

Further, the active layer, electrode material, insulating film, etc. are not limited to the examples and can be selected as appropriate. Further, the method for forming these films can be appropriately selected from laser annealing, vapor deposition, plasma CVD, CVD, sputtering, and the like.

[Effects] As explained above, according to the present invention, at least the vicinity of the interface with the p- or n-type polycrystalline silicon layer serving as the active layer of the source/drain electrode is composed of a transition metal silicide layer, and the active layer Since a Schmittkey barrier is formed at the interface between the source and drain electrodes, the OFF
It becomes possible to form a thin film transistor with a small current and good device characteristics.

Additionally, there is no need for a diffusion process or ion implantation process.
In addition to reducing manufacturing costs, it can be formed in a low-temperature process and has a micro-a
This makes it possible to easily form a 4R structure.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing a thin film transistor according to an embodiment of the present invention, and Figs. 2 (a> to (e) are manufacturing process diagrams of the same thin film transistor. 1...Glass substrate, 2...Active layer, 3) ... Gate insulating film, 4... Gate electrode, 5 Source electrode, 6...
-Drain electrode, 5a, 6a...Chromium silicide layer, 5b, 6b...Chromium layer, 7...Interlayer insulating film, 8
...Inter-element wiring layer. Figure 2 (Q) Figure 2 (b) Figure 2 (C) Figure 2 (d) Figure 2 (e)

Claims (7)

[Claims] (1) In a thin film transistor using a polycrystalline silicon layer containing impurities as an active layer, the source/drain electrodes are made of a transition metal silicide layer so as to form a Schottky barrier at the interface with the polycrystalline silicon layer. A thin film transistor characterized by comprising: (2) The thin film transistor according to claim (1), wherein the source/drain electrodes are composed of a two-layer structure film including a transition metal silicide layer and another conductor layer. (3) The thin film transistor according to claim (1), wherein the conductor layer is a thin film layer made of the transition metal. (4) The active layer is made of a p-type polycrystalline silicon layer, and the transition metal is chromium (Cr), molybdenum (Mo),
Zirconium (Zr), tantalum (Ta), titanium (T
i) The thin film transistor according to any one of claims (1) to (3). (5) The active layer is made of an n-type polycrystalline silicon layer, and the transition metal is platinum (Pt) or palladium (Pd).
A thin film transistor according to any one of claims (1) to (3), characterized in that the thin film transistor is any one of: (6) In a method for manufacturing a thin film transistor using a polycrystalline silicon layer containing impurities as an active layer, the step of forming source/drain electrodes includes a deposition step of forming a transition metal layer in contact with the active layer; 1. A method for manufacturing a thin film transistor, comprising a heating step of performing heat treatment to cause an interfacial reaction at an interface between a polycrystalline silicon layer and a transition metal layer. (7) Prior to forming the source/drain electrodes, the method includes a step of forming the polycrystalline silicon layer on the substrate, and a step of forming a gate insulating film on the upper layer, and the method includes the step of forming the polycrystalline silicon layer on the substrate, and the step of forming the gate insulating film on this layer, and the step of passing through the deposition step and the heating step. The thin film transistor according to claim (6), further comprising the step of patterning the transition metal layer so that the transition metal layer becomes a gate electrode and a source/drain electrode. Production method.