JPS63268311A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an output leakage current by bringing the source potential of two n-channel MOS transistors(TRs) of the pre-stage driving a gate of an insulation gate type TR connected to an external output terminal to a base potential VBB. CONSTITUTION:The base potential VBB is applied to sources of TRs Q2 and Q4. Moreover, threshold values Vth2, Vth4 of the TRs Q2 and Q4 are selected to exceed respectively lVBBmaxl. Thus, TRs Q1 and Q3 are cut off when nodes N1, N2 reach both nearly the VCC potential, and the TRs Q2 and Q4 go to an energized state. Thus, both nodes N3, N4 reach nearly the potential VBB. Then, TRs Q5 and cut off completely, and the external output terminal reaches a high impedance state. In bringing the output terminal to the high impedance, then the output TR is completely turned off to prevent the output leakage current.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an output circuit of a semiconductor integrated circuit, and relates to prevention of output leakage current.

[Prior Art] Conventionally, the output circuit of a semiconductor integrated circuit device has been a circuit as shown in FIG. (QX, Qri is p channel/I/MO8
) Langista. (Q2. Q4. Qs, Ql) is n
Channel MO8) Ranjisk. ω1) is the transistor (
A node that determines the gate potential of Ql-Q2). (N2)
is a node that determines the gate potential of the transistors (Ql, Q4). ω3) determines the gate potential of the transistor (Qs) by taking the drains of the transistors (Qx, Qz) in common. (N4) shares the drains of the transistors (Ql, Q4) and determines the gate potential of the transistor (Ql). ω5) is an external output terminal.

(Vtht), (vth2)+ (Vth3)+ (
vth4)t (Vth5)s (Vth6) are respectively (Q l) (Q2) (Qri (Q4) (Qs)
The threshold voltage of (Ql) is shown.

Next, the operation will be explained. Node (N L)l (N
2) are respectively public high potential% (Vcc Vthi)+
(Vcc-Vth3), the transistor (Ql
), (Qs) are OFF l,, (Q2), (Q4) Vi
Through the field, both nodes (N3) and (N4) become "L# low potential, almost GND potential. Then, the transistor (Q
s) and (Qa) are both cut off, and the external output terminal (N5) becomes a high impedance state.

Considering the same way, the external output terminal (N5) is approximately vo.

In order to make the potential, a transistor (Ql), (Q4
) k 'II ON state, (Q2), (Qa) The node potential (Nl) (N2) may be set to L or OFF state. At this time, the node (N3) is vo. The potential node (, N4) is approximately at GNDg level.

In addition, in order to bring the external output terminal CE5) almost to the GND potential, V is set to a node potential ω1)CN2) that turns off the transistors (Ql) and (Q4), and makes the transistors (Q2) and (Qs) suddenly conductive. Just do it. At this time, the node (N3
) ti il tt aAND potential, node (N4)l
-1: The voltage is almost at vc0 potential.

Further, a node potential ω1) (N2) that would cause the transistors (Ql) and (Qs) to suddenly become conductive is prohibited.

[Problem to be solved by the invention j Since the conventional semiconductor device is configured as described above,
If a noise voltage is applied to the GHD terminal while the external output terminal is at high impedance, 7-rd (N3. N4) in Figure 2 will occur.
There are problems such as the transistors (Qs, Q6) instantaneously becoming KOH and current flowing even though they are in a high impedance state.

This release E! Method A was developed to solve the above-mentioned problems, and the purpose is to obtain a semiconductor device that can prevent output leakage current.

[Means to solve the problem]

In the semiconductor device according to the present invention, the source potential of two on-channel MO8 transistors at the front stage that drive the gate terminal of the insulated gate transistor connected to the external output terminal is set to the substrate potential (VBB).

[Function J In this invention, setting the source potential of the two n-channel MO8 transistors at the front stage of the external output transistor to the substrate potential (VBB) means that the gate potential of the external output transistor becomes lower than the GND potential, so that the external output transistor Completely turned off to prevent output leakage current.

[Embodiment J of the Invention An embodiment of the invention will be described below with reference to the drawings. 1st
In the figure, (Ql) ~ (Q6), ω1) ~ ω5)
Since it is exactly the same as the conventional output circuit shown in FIG. 2, the explanation will be omitted. (VBB) is the substrate potential of the transistor (Q
2) Connect to the source of (Q4). Also, the threshold value ('Vthz) of transistors (Q2) and (Q4) (V
tht) exceeds ilVaBmaxl. Next, the operation will be explained. In the following circuit shown in Fig. 1, the node (Ml)l (N2) (!: 4 is approximately V.

If the potential is the same, transistors (Ql)-(Qs) will be in a cutoff state, and transistors (Q2)=(Q4) will be in a constant conduction state. □From this, node ω: J) * (N4)
Both have a potential of approximately VBB. Therefore, the transistors (Q+.) and (Qa)d 56 are all cut off, and the external output terminal becomes a high impedance state.

Also, the external output #AI child CN5) is almost vo. To make the potential r/C transistor (Ql) + (Q4)
F m state, (Q2) Threshold value (Vthx) that makes (Qs) a cutoff state I island * (Also, external output terminal (
In order to bring N5) to approximately G11D potential, transistor (Ql) (Q4) is cut off, (qz)(Qs
) is the same threshold value as above (Vth
t) (Vth2) (Vt=a) (Vth4).

Also, as in the conventional case, it is prohibited to suddenly turn on both the transistors (Ql) and (Qs).

[Effect of the Invention] As described above, according to the present invention, the source potential of the n-channel MO8) transistor in the previous stage that drives the gate of the output transistor connected to the external output terminal is set to the substrate potential VBB.
Therefore, when the output terminal is set to a high impedance state, the output transistor is completely 01i'F to prevent output leakage current, and for this reason, the threshold voltage of the output transistor can be lowered and the mutual conductance gm can be increased. Has excellent effects.

[Brief explanation of the drawing]

The first factor is a circuit diagram showing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional semiconductor device.
In the diagram, (Ql) is a p-channel MO8 transistor, (Q2) is an n-channel MO8) transistor, and (Qs) is a p-channel MO8 transistor.
) transistor, (Q4) is n channel MO8) transistor, (Qs) tin channel MOS transistor,
(Qs) is an n-channel MO8) transistor, cNl) is a node that drives the gate of (Ql) (Q2), ω2)
No M1 driving the gate of Fi(Qx) (Q4)
QJ3) #: t: (Q5) Fully driven node, ω4) is the node that drives the gate of (Q6), ω5
)Fi external output terminal・(VBB) indicates the substrate potential. Note that the four symbols in each figure indicate the same or equivalent parts.

Claims (3)

[Claims] (1) A semiconductor device characterized in that the potential of the gate electrode of an N-channel insulated gate transistor connected to an external output terminal of the semiconductor device is set to be below the V_S_S (GND) potential when the output is floating. (2) The semiconductor device according to claim 1, characterized in that when substrate potential generation is performed internally, the substrate potential generated inside the chip is made to be the potential of the gate electrode. (3) Among the N-channel insulated gate transistors connected to the output terminal, only the gate electrode of the insulated gate transistor whose one drain electrode is connected to V_C_C is set to be below the V_S_S potential when the output is floating. A semiconductor device according to claim 1, characterized in that: