JPS63144498A - Eprom with built in form identification code - Google Patents

Abstract

PURPOSE:To prevent malfunction by using an output of already written signal detection circuit so as to control the operation of a form identification code readout circuit. CONSTITUTION:The already written signal detection circuit 4 uses a mode detection circuit so as to detect a read only memory EPROM cell capable of programming electrically in an internal circuit 1 to be entered into the write mode and applies writing to an excess EPROM cell. In this case, the threshold voltage of the cell is increased and even if a power supply voltage is applied to the gate, the memory cell transistor (TR) remain turned off but turned on in case of the non-write state, then the detection circuit 4 gives an output of different level depending whether the EPROM cell in the internal circuit 1 is already written or not. Then when the output of the detection circuit 4 represents the write end, a two input AND circuit 5 forms a logic not operating a form identification code readout circuit 3 even when a high voltage is applied to a terminal A9 and gives the result to the input of the circuit 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrically programmable read-only memory (
(hereinafter referred to as EPORM), particularly relates to an EPROM containing a product identification code.

[Conventional technology]

Recently, the writing voltage of EPROM has been reduced (from 21 volts to 12.5 volts), and products with different verify modes, which are operating modes for testing the validity of program writing, have also appeared. Furthermore, various products have been commercialized in terms of memory capacity, and the reality is that each type has different conditions, such as write voltage value, @ write voltage input waveform, number of writes, etc. .

In order to cope with this diversification of products, product identification codes have been introduced. This is done by storing the product code assigned to the product as a ROM inside the product, and using one predetermined address terminal (A and Q terminals).
The code can be read by applying a high voltage (12 volts) from the outside.

For EPROMs with a built-in product identification code as described above, before writing, apply a high voltage to the A9 terminal to read the product code, and then automatically set the write conditions suitable for the product before writing. PROM writers with functions such as entering operation are starting to become available.

As shown in Figure 2, a conventional EPROM with a built-in product identification code has an internal circuit 1 to function as an EPROM, and a high voltage detection circuit 2 to detect that a high voltage is applied to the A9 terminal. , a product identification code reading circuit 3 which is normally unselected but becomes operational in accordance with the output signal of the high voltage detection circuit 2. The product identification code reading circuit 3 includes a ROM section in which a code is stored, a decoding circuit for selecting the ROM section, and a circuit for deselecting the EPROM section when the ROM section is selected.

[Problem that the invention seeks to solve]

In the conventional configuration described above, when the high voltage detection circuit 2 detects a high voltage, the product identification code reading circuit 3 is unconditionally activated.
is activated, and all normal EPROM parts become unselected. Therefore, when mounting the written EPROM and only reading it, a high voltage is applied to A9 due to some reason such as capacitance coupling between wiring. and RO memorized the code.
Since the M section is selected, there is a possibility of malfunction.

In contrast to the above-mentioned conventional EPROM with built-in product identification code,
According to the present invention, this can be prevented by preventing the product identification code reading circuit from operating with only a signal from the high voltage detection circuit 2, and furthermore, the circuit for that purpose is an EPR.
It has an original content in that it can be constructed using the same technology in the same chip as the OM section.

[Means for solving problems]

The EPROM of the present invention is an EPROM with a built-in product identification code that has an address input terminal and high voltage application terminal, a high voltage detection circuit that detects a high voltage higher than the power supply voltage applied to this terminal, and a product identification code successive output circuit. , a written detection circuit detects whether or not writing has been performed to the upper EPROM, and an AND operation is performed on the output of the high voltage detection circuit and the output of the written detection circuit, and the result of the operation is sent to the product identification code reading circuit. The present invention is characterized in that a 2-input AND circuit is provided to supply a 2-input AND circuit, and the operation of the product identification code reading circuit is controlled by the output of the written detection circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

1 is an internal circuit to function as an EPROM,
2 is a high voltage detection circuit that inputs the A9 terminal, 4 is a written detection circuit that outputs different levels depending on whether it is written or not written to the EPROM in internal circuit 1, and 5 is the output of high voltage detection circuit 2 and the written state. A two-input AND circuit receives the output of the detection circuit 4 as an input, and 3 is a product identification code reading circuit controlled with the output of the two-man logic circuit 5 as an input.

Written detection port i? 84 is, for example, a mode detection circuit and an extra EPROM cell in the internal circuit 1.
It includes a PR, OM cell and a write circuit, and a mode detection circuit detects that an EPROM cell in the internal circuit 1 enters a write mode, and writes to the extra EPROM cell.

When writing is performed on an EPROM cell, the threshold voltage of the cell increases, so that the memory cell transistor remains off even if a power supply voltage is applied to the gate in the normal state. On the other hand, since the memory cell transistor is on in the unwritten state, it is possible to change the output of the two-input AND circuit 5 using this difference. E in internal circuit 1
When the P ROM cell is in an unwritten state, the extra EPR
If the OM cell is also unwritten and the EPROM cell in the internal circuit 1 has been written, the extra EPROM cell will also be in the written state. It outputs different levels depending on whether it has been written or not.

Then, in the two-input AND circuit 5, if the output of the written detection circuit 4 indicates that writing has been completed, A
Even if a high voltage is applied to terminal 9, a logic is created that does not operate the product identification code circuit 3, and is supplied to the input of the product identification code reading circuit 3. Therefore, in the case of the EPROM using this embodiment, the product identification code reading circuit 3 operates only in an unwritten state, and does not malfunction during normal reading use.

Here, for convenience, the high voltage detection circuit 2 is at a high level when a high voltage is applied to the A9 terminal, and is at a low level otherwise. It is assumed that the product identification code reading circuit 3 operates only when its input (that is, the output of the two-input AND circuit 5) is at a high level. Of course, there is no problem even if all of these logics are independently reversed, and it is only necessary to change the circuit configuration of the two-input AND circuit 5. In this case, the two-input AND circuit 5 has a configuration as shown in FIG. In other words, NAND of two people A and B
An inverter is added to the circuit, and the output C becomes the required logic output as described above.

Further, FIG. 4 shows an example in which the two-input AND circuit 5 is implemented with a different configuration. The configuration is such that an inverter is connected to each of the two-manpower A and B, and an output C is obtained from a two-manpower NOR circuit whose respective outputs are input.

Furthermore, the inverter in FIGS. 3 and 4 may be omitted or added to a different location depending on the logic of the outputs of the high voltage detection circuit 2 and write detection circuit 4, and the input of the product identification code reading circuit 5. It is possible to do so.

〔Effect of the invention〕

As explained above, the present invention adds a written detection circuit and a two-input AND circuit whose inputs are the output of the written detection circuit and the output of the high voltage detection circuit to the conventional EPROM with a built-in product identification code. This has the effect of preventing malfunctions caused by the product identification code reading circuit operating as a result of accidentally applying a high voltage to the input terminal when used only for reading.

Furthermore, if the same EPROM cell as a normal memory cell is used for the written detection circuit, the circuit can be realized on the same chip without using any special technology.

Further, at the same time as erasing the normal memory cell section, the EPROM cell in the written detection circuit is also erased, making it possible to return to a state in which the product identification code can be read.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the present invention, FIG. 2 shows a conventional example, FIG. 3 shows an example of the configuration of the two-input AND circuit 5 in FIG. 1, and FIG. 4 shows the two-input AND circuit in FIG. 1. This is another example of No. 5. 1... Internal circuit, 2... High voltage detection circuit, 3...
Product identification code reading circuit, 4... writing detection circuit,
5...2-input AND circuit.

Claims (1)

[Claims] In an EPROM with a built-in product identification code, which has an address input terminal and high voltage application terminal, a high voltage detection circuit that detects a high voltage higher than the power supply voltage applied to the terminal, and a product identification code reading circuit. , a written detection circuit that detects whether or not writing has been performed to the EPROM, and an AND operation of the output of the high voltage detection circuit and the output of the written detection circuit, and the result of the operation is used as the product identification code. 1. An EPROM with a built-in product identification code, comprising: a two-input AND circuit that supplies a readout circuit; and an output of the written detection circuit controls the operation of the product identification code reading circuit.