JPH02214156A - Non-volatile semiconductor device - Google Patents
Non-volatile semiconductor deviceInfo
- Publication number
- JPH02214156A JPH02214156A JP1034369A JP3436989A JPH02214156A JP H02214156 A JPH02214156 A JP H02214156A JP 1034369 A JP1034369 A JP 1034369A JP 3436989 A JP3436989 A JP 3436989A JP H02214156 A JPH02214156 A JP H02214156A
- Authority
- JP
- Japan
- Prior art keywords
- data
- rewrite
- memory
- rewritten
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電気的に書き換え可能々不揮発性半導体を記憶
素子とした不揮発性記憶装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a nonvolatile memory device using an electrically rewritable nonvolatile semiconductor as a memory element.
電気的に書き換え可能な不揮発性半導体(lla。 Electrically rewritable non-volatile semiconductor (lla.
trioally Ierasable &!1(l
Programmable ROIJ以下KIFROM
と呼ぶ)は、コントローラから与えられる書き込み
モード信号に従−1’H”L’に対応した情報に応じて
対応するメモリセルに例え−d約gotの高電圧が印加
されると、メモリセルのしtI−値電圧が変化し、情報
が書き込まれる。そして、メモリに高電圧をかける方法
としては高電圧用の電源端子を外に設ける方法、および
XO内部に昇圧回路を設けて通常用−られる5v電源か
ら昇圧させる方法とがある。trioally Ierasable &! 1(l
Programmable ROIJ below KIFROM
When a high voltage of approximately -d got is applied to the corresponding memory cell according to the information corresponding to -1'H"L' according to the write mode signal given from the controller, the memory cell's Then, the tI value voltage changes and information is written.The methods of applying high voltage to the memory include providing a high voltage power supply terminal externally, and providing a booster circuit inside the XO. There is a method of boosting the voltage from a 5V power supply.
以上のようなIt!ItPROMを記憶素子として用い
た場合、電源のオン、オフ又は印加電圧の瞬時停電の際
、IIIIFROMが保持して−るデータが破壊される
可能性がある。即ち、外部端子を介して電源から高電圧
を印加する場合、メモリセルへ高電圧を印加した際に、
電源のオン、オフ又は瞬停によって、コントローラから
出力される信号が不安定になると、IO側が誤って書き
込みモードになってしまう可能性があり、またxO内部
に昇圧回路を設けた場合、電源のオン、オフ又は瞬停に
よって、コントローラから出力される信号が不安定にな
ると、書き込みモードを受は入れてしまう可能性がある
。It's like the above! When an ItPROM is used as a storage element, there is a possibility that the data held in the IIIFROM will be destroyed when the power is turned on or off or when the applied voltage is momentarily interrupted. In other words, when applying a high voltage from a power supply via an external terminal, when applying a high voltage to a memory cell,
If the signal output from the controller becomes unstable due to power on/off or instantaneous power failure, the IO side may mistakenly enter write mode, and if a booster circuit is installed inside the xO, the power supply may become unstable. If the signal output from the controller becomes unstable due to on, off, or instantaneous power failure, there is a possibility that the write mode will be entered.
従来の1!tmpiovは電気的に書き換え可能ではあ
るが、多くの場合その一部の領域はデータを書き換える
が、他の領域は一旦書き込んだデータを書き換えること
がない読み出し専用、所nROiJのような用い方をし
て−る場合がほとんどである0従って、ユーザーから見
た場合には書き込んだデータが先に述べたような原因で
乱れてしまい、そのシステムを致命的なものにしてしま
うことから守るために、さまざまな対策を施こしている
。Conventional 1! Although tmpiov is electrically rewritable, in many cases, data is rewritten in some areas, but other areas are read-only, where the data once written is not rewritten, such as nROiJ. Therefore, from the user's point of view, in order to protect the written data from becoming corrupted due to the reasons mentioned above, which could be fatal to the system, Various measures are being taken.
例えば、
(1)”入力端子にプルアップ、プルダウン抵抗をつけ
る。For example, (1) Attach pull-up and pull-down resistors to the input terminals.
(2) : [源検出回路をIO内部、又は外付けでつ
ける。(2): [Attach the source detection circuit inside the IO or externally.
などが考えられる。しかし、これらの対策で完全に誤書
き込みからの保護を行なうには不十分であるという問題
点があった0本発明は上記従来の問題点を解消するため
になされたもので、IEFROMのメモリ領域のうち、
書き換え回数の設定された回数以上になると、データが
完全に固定される不揮発性半導体装置を得ることを目的
とする0〔課題を解決するための手段〕
本発明の不揮発性半導体装置は記憶素子の領域のうち、
書き換え回数の制限を設け、その回数を越えると、完全
にデータが固定される領域を設け−たものである。etc. are possible. However, there was a problem in that these measures were insufficient to completely protect against erroneous writing.The present invention was made to solve the above-mentioned conventional problems. Of these,
[Means for Solving the Problems] A nonvolatile semiconductor device of the present invention has a nonvolatile semiconductor device in which data is completely fixed when the number of rewrites exceeds a set number of times. Of the areas,
A limit is set on the number of rewrites, and an area is provided in which the data is completely fixed when the number of rewrites is exceeded.
本発明の不揮発性半導体記憶装置は書き換え回数が設定
されると、ある特定のメモリ領域のみは書き換え回数を
越えるとデータを固定する。In the nonvolatile semiconductor memory device of the present invention, when the number of rewrites is set, data is fixed only in a certain memory area when the number of rewrites is exceeded.
以下、本発明の一実施例を示す図に基づき詳述する。図
は本発明に係る不揮発性半導体装置の構成を示すブロッ
ク図である0図中、(1)はEEPROIJからなるメ
モリセルアレイで、このメモリセルアレイ(1)はデー
タが書き換え可能な書き換え領域OBおよび書き換え回
数が制限された領域0ので構成される。この書き換え領
域α℃および(6)は互いに独立的に動作する書き込み
回路(2)又は(3)にそれぞれ接続される。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below based on the drawings. The figure is a block diagram showing the configuration of a nonvolatile semiconductor device according to the present invention. In the figure, (1) is a memory cell array consisting of an EEPRO IJ, and this memory cell array (1) includes a rewrite area OB where data can be rewritten and a rewrite area OB where data can be rewritten. Consists of area 0, which has a limited number of times. The rewriting regions α° C. and (6) are respectively connected to write circuits (2) or (3) that operate independently of each other.
書き込み回路(2)及び(3)はそれぞれ昇圧回路(4
)および(5)に接続され、昇圧回路(4)及び(5)
は制御回路(6)に接続され、制御回路(6)は外部端
子(7)に接続される。また、制御回路(6)はさらに
カウンタ(9)に接続され、カウンタ(9)はデータ入
力回路(8)を介して外部端子αGに接続される。The write circuits (2) and (3) each have a booster circuit (4).
) and (5), and the boost circuit (4) and (5)
is connected to a control circuit (6), and the control circuit (6) is connected to an external terminal (7). Further, the control circuit (6) is further connected to a counter (9), and the counter (9) is connected to an external terminal αG via a data input circuit (8).
次に動作につφて説明する。Next, the operation will be explained with reference to φ.
まず、メモリ制限領域υヘデータを書き込む前に、あら
かじめデータが固定されるまでのカウンタのセット値を
例えば外部端子QQよりシリアルに入力させて置く。First, before writing data to the memory limited area υ, a counter set value until the data is fixed is serially input from, for example, an external terminal QQ.
次に、外部端子(7)を例えばlOV以上に設定し、他
端子より設定されたあるモードを入力したときのみ書き
込みが実施される。この書き込みは前述したセット値の
回数°のみ書き換えが可能であり、例えば、最初にセッ
トされた値が111であれば、1回のみ書き換えが可能
となる。このようにして、書き込みが所定回か行なわれ
た後、ユーザは完全にデータを固定させることができる
。データが固定されたあとは、外部端子(7)を例えば
Ovにしておき、システムに組込んで評価することがで
きるようになる0
なお、上記実施例では書き込みに制限のあるメモリ領域
αのと通常の書き込み動作可能な領域■を分けた場合を
示したが、1つのメモリ領域の中でアドレスデコーダに
より、メモリ領域を選択する方法であってもよい0この
場合は先に説明した実施例の他にアドレスを選択する手
順が追加されることはいうまでもない。Next, the external terminal (7) is set to, for example, lOV or more, and writing is performed only when a certain mode set from another terminal is input. This writing can be rewritten only the number of times of the set value described above. For example, if the initially set value is 111, it can be rewritten only once. In this way, after a predetermined number of writes, the user can completely freeze the data. After the data is fixed, the external terminal (7) is set to Ov, for example, and it can be incorporated into the system and evaluated. Although the case where the normal write operation possible area is divided is shown, it is also possible to select a memory area using an address decoder within one memory area. Needless to say, an additional step for selecting an address is added.
以上のように本発明によれば電気的に書き換え可能な記
憶素子の一部に書き換え回数の制限をもたせしかも、設
定回数以後の書き換えに対しデータが完全に固定される
ようにしたので、データの確実な保護に関して優れた効
果を有する0As described above, according to the present invention, a part of the electrically rewritable memory element is limited in the number of times it can be rewritten, and the data is completely fixed against rewriting after the set number of times. 0 with excellent effect on reliable protection
第1図は本発明の一実施例である不揮発性半導体装置の
構成を示すプUツク図である0図ニおいて−(1)・−
メモリアレイ、(2) ? (3)・・・書き込み回路
、(4) # (5)・°・昇圧回路、(6)・・・制
御回路、(8)・・・入力データ回路、+9)−・・カ
ウンタ、(7) l (10・・・外部端子、
■・・・書き換え領域、
(2)・・・書き換え回数の制
第
図
限された領域である。FIG. 1 is a block diagram showing the configuration of a non-volatile semiconductor device which is an embodiment of the present invention.
Memory array, (2)? (3)...Write circuit, (4) # (5)・°・Boost circuit, (6)...Control circuit, (8)...Input data circuit, +9)-...Counter, (7 ) l (10...external terminal, (2)...rewrite area, (2)...limited area for number of rewrites.
Claims (1)
る不揮発性記憶装置において、前記記憶素子の記憶領域
の一部に書き換え後に完全に固定される回路を備えたこ
とを特徴とする不揮発性半導体装置。A nonvolatile memory device using an electrically rewritable nonvolatile semiconductor as a memory element, characterized in that a part of the memory area of the memory element is provided with a circuit that is completely fixed after rewriting. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1034369A JPH02214156A (en) | 1989-02-14 | 1989-02-14 | Non-volatile semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1034369A JPH02214156A (en) | 1989-02-14 | 1989-02-14 | Non-volatile semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02214156A true JPH02214156A (en) | 1990-08-27 |
Family
ID=12412258
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1034369A Pending JPH02214156A (en) | 1989-02-14 | 1989-02-14 | Non-volatile semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02214156A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0701177A1 (en) | 1994-09-02 | 1996-03-13 | Canon Kabushiki Kaisha | Magnetic toner and image forming method |
US5715501A (en) * | 1994-04-15 | 1998-02-03 | Canon Kabushiki Kaisha | Image forming method using a surface with a specified water contact angle and process cartridge using such a method |
US5731122A (en) * | 1994-11-08 | 1998-03-24 | Canon Kabushiki Kaisha | Image forming method and image forming apparatus |
US5858593A (en) * | 1996-07-31 | 1999-01-12 | Canon Kabushiki Kaisha | Magnetic toner, apparatus unit and image forming method |
US5972553A (en) * | 1995-10-30 | 1999-10-26 | Canon Kabushiki Kaisha | Toner for developing electrostatic image, process-cartridge and image forming method |
US6447969B1 (en) | 1999-06-02 | 2002-09-10 | Canon Kabushiki Kaisha | Toner and image forming method |
US7718338B2 (en) | 2005-03-29 | 2010-05-18 | Canon Kabushiki Kaisha | Charge control resin, and toner |
US8383312B2 (en) | 2005-11-11 | 2013-02-26 | Canon Kabushiki Kaisha | Resin for toner and toner |
-
1989
- 1989-02-14 JP JP1034369A patent/JPH02214156A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5715501A (en) * | 1994-04-15 | 1998-02-03 | Canon Kabushiki Kaisha | Image forming method using a surface with a specified water contact angle and process cartridge using such a method |
EP0701177A1 (en) | 1994-09-02 | 1996-03-13 | Canon Kabushiki Kaisha | Magnetic toner and image forming method |
US5618647A (en) * | 1994-09-02 | 1997-04-08 | Canon Kabushiki Kaisha | Magnetic toner and image forming method |
US5731122A (en) * | 1994-11-08 | 1998-03-24 | Canon Kabushiki Kaisha | Image forming method and image forming apparatus |
US5972553A (en) * | 1995-10-30 | 1999-10-26 | Canon Kabushiki Kaisha | Toner for developing electrostatic image, process-cartridge and image forming method |
US5858593A (en) * | 1996-07-31 | 1999-01-12 | Canon Kabushiki Kaisha | Magnetic toner, apparatus unit and image forming method |
US6447969B1 (en) | 1999-06-02 | 2002-09-10 | Canon Kabushiki Kaisha | Toner and image forming method |
US7718338B2 (en) | 2005-03-29 | 2010-05-18 | Canon Kabushiki Kaisha | Charge control resin, and toner |
US8383312B2 (en) | 2005-11-11 | 2013-02-26 | Canon Kabushiki Kaisha | Resin for toner and toner |
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