JPH01118974A - Card module - Google Patents

Abstract

PURPOSE:To avoid the miswriting actions due to the misoperations of a reader/ writer by inhibiting the data writing actions as long as the reader/writer has no output of high voltage necessary for writing actions. CONSTITUTION:A voltage detecting circuit 3 detects that the voltage of a read instruction line READ exceeds the level of the power supply voltage Vcc and sets the output at an LO level. Then a write instruction signal WRITE is applied to a memory chip 1 only when the output of an LO level is supplied to a gate circuit 4. Therefore data are never written just with the signal of the normal voltage even though any key logic is set at the reader/writer side. Thus it is possible to avoid the miswriting actions due to the misoperations of the reader/writer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a card module, such as a memory card or an IC card, in which a memory chip is mounted.

(Prior art) In recent years, memory cards with a memory chip mounted on them, and I/I with a microprocessor chip mounted along with a memory chip, have become popular.
C cards are becoming popular.

These card modules are used as temporary data storage means or fixed data storage media, and store data used in various processes or programs for executing data processing.

By the way, the data used in the program must not be accidentally rewritten, and the storage medium must basically be non-volatile. It is also desirable to be able to rewrite the contents as needed.

For this reason, conventionally, ultraviolet erasable read-only memory (EPROM), electrically erasable read-only memory (EEFROM), battery-backed random access memory (RAM), and the like have been used as memory chips.

FIG. 3 is a diagram showing an example of the internal circuit configuration of a conventional card module.

In the figure, 1 is a memory chip (including peripheral circuits if battery backup is used), 2a to 2g are connection terminals, Vcc is a power supply line, ADR3 is an address line, DATA is a data line, and WRITE is a write instruction. line READ indicates a read instruction line, C8 indicates a chip select line, and GND indicates a ground line.

In this way, in the conventional memory module, each signal line of the memory chip 1 is directly led out to the outside, and the reader/
It is designed to be connected to the writer side.

Another example is when there are multiple memory chips, in which case the chip select line is increased or
Alternatively, it decodes the address line signal and distributes the chip select signal.

By the way, when an E F ROM is used as the memory chip 1, it is necessary to provide a window for irradiating ultraviolet rays on the card base, and it is also necessary to cover the window with a seal or the like.

In order to solve this problem, EEP is used as the memory chip 1.
When a ROM is used, there is a high probability that the stored contents will be accidentally destroyed.

Large-capacity EEPRO that generally stores programs
Since M (bits in the number 10) operates with a single power supply voltage, if a predetermined key logic is set on the reader/writer side,
Memory contents can be easily rewritten. As a result, it is assumed that the stored contents may be rewritten due to an erroneous operation.

(Problems to be Solved by the Invention) In this way, in conventional card modules, when a large capacity EEPROM is used as a memory chip, the memory contents are accidentally destroyed because it uses a single power supply voltage. The problem was that the probability was high.

The present invention was made under these circumstances, and aims to provide a card module that can almost completely avoid erroneous writing due to erroneous operations on the reader/writer side.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve this object, the present invention implements a nonvolatile memory circuit in which data can be written from the reader/writer side through a predetermined write line. control for inputting data on the write line to the memory circuit only when a signal of a voltage higher than an operating voltage of the memory circuit is applied to a predetermined terminal from the reader/writer side. It is equipped with a write control circuit that performs the following.

(Function) In the card module of the present invention, as long as a signal of a voltage higher than the operating voltage of the memory circuit is applied to a predetermined terminal from the reader/writer side by the function of the write control circuit.
Since the data on the write line is not input to the memory circuit, the possibility that the data in the memory circuit will be destroyed due to an erroneous operation on the reader/writer side is extremely low.

(Example) Hereinafter, details of an example of the present invention will be described based on the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, and parts common to those in FIG. 3 are given the same reference numerals.

In the figure, 1 is a memory chip (including the case with battery backup), 2a to 2g are connection terminals,
Vcc is the power line, ADR3 is the address line, DA
TA is the data line, WRITE is the write instruction line,
READ is a read instruction line, C8 is a chip select line, and GND is a ground line.

3 is a voltage detection circuit which will be described later, and 4 is a write line W.
This is an AND circuit that applies a gate to the RITE signal. Further, 5a is a diode inserted in series with the read instruction line READ, and 5b is a resistor inserted between the read instruction line READ and the power supply line VCC to prevent abnormal voltage from being applied to the memory chip 1. It constitutes a clamp circuit.

FIG. 2 is a diagram showing a specific configuration of the voltage detection circuit 3. As shown in FIG.

In the figure, 6 is an input terminal for a READ signal, 7 is a Zener diode, 8 is a diode clamped to the power supply VCC, and 9 is an inverter. Further, R2 and R3 are resistors for voltage detection and voltage clamping, respectively.

The @ path of this embodiment is operated entirely by the power supply voltage VCC, and the signal that is unnecessary at the time of writing (in this case, RE
AD) line, and is configured so that the gate circuit 4 will not open unless a voltage higher than normal is applied to this line.

That is, the voltage detection circuit 3 detects that the voltage of the read instruction line READ has become higher than the power supply voltage VCC (for example, Vcc
(twice or more), the output is set to LO level, and only when this LO level output is input to gate circuit 4, a WRITE signal instructing memory chip 1 to write is given.

Here, the diode 5a and the resistor 5b are connected to the high voltage REA.
A clamp circuit is configured to prevent the D signal from being applied directly to the memory chip 1, thereby preventing damage to the memory chip 1.

In the voltage detection circuit 3 of FIG. 2, when the potential of the input terminal 6 exceeds the Zener voltage of the Zener diode 7, a voltage is generated across the resistor R2.

If this voltage is set to a value sufficient for the logic level of HI, only then will the output of inverter 9 go to LO.
become the level.

Note that the resistor R3 and the diode 8 constitute a clamp circuit to protect the input of the inverter 9.

Thus, in the circuit of this embodiment, data cannot be written using only a normal voltage signal, no matter what key logic is set on the reader/writer side, so that erroneous writing will not occur.

In this embodiment, the read instruction line, which is unnecessary during writing, is used to apply the high voltage necessary for writing data. However, when the voltage of the write instruction line itself is changed, the write signal can be directly applied. A circuit for generating this may be provided.

[Effects of the Invention] As explained above, the card module of the present invention cannot write data unless the reader/writer side outputs the high voltage necessary for writing.
Writing due to erroneous operations on the reader/writer side can be almost completely avoided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a circuit configuration of an embodiment of the present invention, FIG. 2 is a diagram showing a specific configuration of the voltage detection circuit in FIG. 1, and FIG. 3 is an internal circuit configuration of a conventional card module. FIG. 1...Memory chip, 2a-2g...Connection terminal, 3
...Voltage detection circuit, 4...AND circuit, 5a, 8.
...Diode, 5b...Resistor, 6...Input terminal,
7... Zener diode, 9... Inverter. Applicant Toshiba Corporation Patent Attorney Sasa Suyama - Figure 1 Figure 2 Figure 3

Claims (2)

[Claims] (1) In a card module mounted with a non-volatile memory circuit in which data can be written from the reader/writer side through a predetermined write line, the operation of the memory circuit from the reader/writer side to a predetermined terminal. A card module comprising a write control circuit that controls input of data on the write line to the memory circuit only when a signal of a voltage higher than the voltage is applied. (2) The card module according to claim 1, wherein the predetermined terminal is a terminal for reading data from the memory circuit.