JPS6152777A - High speed picture processing device using minimum average error method - Google Patents

Abstract

PURPOSE:To make processing highly speedly by installing a constant multiplier divider part between a central processing part and a data memory part, executing a constant multiplier processing directly to the data outputted from the data memory part. CONSTITUTION:A data memory part 2 stores error data which becomes necessary at a processing process of an average error minimum method. In accordance with a data memory part control signal 4, data are outputted to a memory side data bus 6 when the memory is read, and when the memory is written, the data on the memory side data bus 6 are fetched and stored. When the result, in which a constant multiplying and dividing is executed at the processing process of an average error minimum method, is submitted to error data in a data memory part 2 by the contents of a constat multiplier divider part control signal 5 outputted from the central processing part 1, a constant multiplier divider part 3 outputs the data of the result that the constant multiplying dividing is executed to the data on the data bus 6, to a data bus 7 of the CPU side.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an apparatus for performing processing at high speed using the minimum average error method among methods for expressing halftones and the like using dots.

[Prior art]

Various methods of expressing halftones using dots have been announced.

Among these methods, the method named the minimum average error method is currently considered to have good image quality.

This method was developed in May 1969 by M, R, 5chroeder (US EEE Sl:+e
A paper published on ctrum
om computersJ.
ocal 5patialav, eras of
brlghtnessJ is the basic, then J,]r,
In May 1976, Jarvis (Bell Laboratories, USA) et al.
A paper published in image processing “
A 5urvey of techniques
for the display of cont.
Innocent tone picture son be
In level displays J, "Minim
izedaverage error method
This is an improved method called J. Although this method is said to have good image quality, it is considered that it is not suitable for practical use because it requires ten or more multiplication and division operations to process one pixel, so the processing time is too long. Furthermore, in the case of a color image, the number of processing units is 3 to 4 times as large as that in the case of a monochrome image, which further impracts practical use.

Conventional methods for reducing the time spent on multiplication and division operations include adding a sub-processor dedicated to multiplication,
There were methods such as using a central processing unit (hereinafter abbreviated as CPU) with high-speed multiplication instructions.However, it took time to exchange data with subprocessors, and the OFU's internal registers were used to execute multiplication instructions. Since it is necessary to load part of the data into the computer, there is a limit to speeding up the entire process, and the cost also increases.

〔the purpose〕

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, it is an object of the present invention to provide an apparatus that executes processing operations using the minimum average error method at high speed.

〔Example〕

An embodiment of the invention is shown in FIG. The central processing unit 1 has the function of controlling the entire device. The data storage unit 2 is
It is used to store error data required in the processing process of the minimum average error method, and is sent to the memory side data bus 6 at the time of memory sword according to the data storage section control signal 4 output from the central processing section 1. It outputs data, and at the time of memory write, data on the memory side data bus 6 is taken in and stored. The constant multiplier/divider unit 3 performs α)○PU according to the contents of the constant multiplier/divider control signal 5 output from the central processing unit 1.
OJ! 1 data bus Z data is output as is to the memory side data bus 6.

b) Open the data on the memory side data bus 6 as is.
Output to U-side data B. C) The data on the memory side data bus 6 is subjected to constant multiplication and division, and the resultant data is output to the CPU side data bus 7. An appropriate constant to be multiplied is selected by the constant multiplication/division ring section control signal 5.

Any one of the functions α) to C) above is selected. When the central processing unit 1 performs normal data writing to the data storage unit 2, α), and when performing normal data reading, b)
) function is selected. When it is desired to obtain as data the result of multiplying the error data in the data storage unit 2 by a constant required in the processing process of the minimum average error amount method, the function C) is selected. This is a more specific example. The constant multiplication/division section includes a bidirectional three-stitch gate 9 and a multiplier A1.
01 multiplier B11. A part of the address signal output by the central processing unit (2) is used to specify an arbitrary memory cell in the data memory 8 through the address signal E15, and two of the remaining address signals, address signal AQ + address signal B (2) is used as a constant multiplication/division ring control signal. The multiplier selector 12 operates only when the data memory select signal [phase] is output, and at this time, it decodes the address signal Ao and address signal B◎ and selects only one of the multiplier select signals 17. Make it valid. As a result, when the bidirectional three-state gate 9 is selected, its direction is switched by the read/write selection signal 17, and normal memory read/write is performed. Also, when a memory read is performed with one of the multipliers selected, the data memory 8
The data outputted to the memory side data bus B is multiplied by a constant determined by each multiplier, and the resulting data is
The data is output to the PU side data bus 7 in almost real time.

Next, based on FIG. 2, the procedure for actually performing the process of the minimum average error method will be described.

In the minimum average error method, the density data of each pixel is binarized into R and O in order to represent a gradation image as a dot that can take only two density values, R and 0, which correspond to the presence or absence of a dot. . For this reason, as shown in FIG. 3, a binarization error F! occurs in pixels that have already been binarized around the pixel of interest to be binarized. , pay attention to l. This error 5 is multiplied by 1 by a weight that has a larger value closer to the pixel of interest to obtain a weighted average of the errors. As the weight value to be multiplied at this time, the value of the weight matrix as shown in Fig. 4 is usually used, but Figs.
Variations as shown in FIG. 9 are also possible. When an appropriate weight matrix is adopted, and the weight values are y'tc, t, the weighted average of errors A m, n can be obtained by the following formula. Now, if we adopt the weight matrix shown in Figure 6, equation (1) becomes +Km-z *
n-x+2Fim-1, n-x+41! :m, n-
1+ 2:Bm+x e n-l+ 1%+4*n
-t+21m-2,%+41!1m-1. s)...
...(1) 1 formula However, k', t Wk, l=20. The value of K k,l is stored in the data memory 8
Remember it. At this time, a 2x multiplier is used for multiplier A [phase] in Fig. 2, a 4x multiplier is used for multiplier B11, and the constant to be multiplied is the weight value vrk that appears in the weight matrix.
, l. With this setting, by appropriately setting the athis signal A14 and the address signal B15 and reading the error data Ek,,l in the data memory 8, IICHk,t can be set to 1 immediately.
The result of constant multiplication by a factor of 2 or 4 appears on the data bus 7 on the CPU side. That is, from the perspective of the central processing unit (2), in addition to the real memory area of the data memory 8, there are two image memory areas, and these image memory areas have f of the real memory area multiplied by l'e constant. It will appear as if the data is being memorized. As a result, the calculation of equation (1) 1 is performed by manipulating the memory address and simply adding the data in the memory, and finally, F, W k, ('t' Qj) Become.

The above is the portion of the processing of the minimum average error method that is sped up by the present invention.

After calculating this Am, %, the process of minimum average error method is as follows:
If the level i11 density data of the pixel of interest is mln, then the corrected density data E' Tn + n, which is considered to cancel out the error generated around the pixel of interest, are calculated as m, 't.
s = engineering m, % + A m, % 01 = -(
It is determined as shown in Equation 21, and binarized depending on whether the 9% value is closer to 0 or R. That is, the densities p m and n after binarization are determined as follows. Also, the error E and n that occur in the pixel of interest at this time are: □, 1: m, nP yu, 5 ... It is determined as in equation (4). This completes the binarization process for the pixel of interest, and this error K m , n is used when processing the next pixel.

FIG. 10 is an example of a 4x multiplier. The data is −
It is expressed as a signed 8-bit binary number in the range of 128 to ±127, the most significant bit is a sign bit, and negative numbers are expressed as two's complement. However, in order to prevent the data width from exceeding 8 bits when multiplied by 4, it is actually necessary to suppress the accuracy of the error data to within 6 bits. To multiply this multiplier by 2r' (% is an integer),
It takes advantage of the fact that it is only necessary to shift the bits to the left for binary numbers, and it consists only of general-purpose three-stitch gates. In addition to this, this shift circuit can be applied to multiply by a constant of the form 27.

Also, using a weight matrix as shown in Figure 8,
If the maximum weight value does not exceed 1, the effective bit widths of the memory-side data bus ■ and the CPU data bus ■ can be made the same. An example is shown in Fig. 12. A 72x multiplier can also be realized with a similar shift circuit.

FIG. 8 is an example of a weight matrix in which the sum of weight values is 1. When such a weight matrix is used, in equation (1);'4''k,
Since the value of l is 1, l in the calculation of equation (1):
``Division by k and l becomes unnecessary.

Furthermore, although only two multipliers are used in the embodiment shown in FIG. 2, the number of address lines for controlling the multiplication/division section is one (%=1
．． 2. ), up to 2n multipliers, including the bidirectional three-y-itecate 9, can be controlled, so weight matrices with many types of constants to be multiplied can be used without problems. Further, these address signals may include those generated within the central processing unit 1 by a method such as port output switching.

FIG. 12 is an example of a multiplier that can realize an arbitrary constant value. Read-only memory (hereinafter referred to as RO) is used as a multiplier.
(abbreviated as M), the address input terminal of RoM is connected to the memory side data bus 6, and the data output terminal is connected to cpa.
It is connected to @Data Day 7. By writing the constant multiplication results as data in the ROM in advance, a multiplier with an arbitrary magnification can be obtained. Also, Figure 13 shows the first
This is an embodiment in which a plurality of multipliers shown in FIG. 2 are combined into one chip. This takes advantage of the fact that different areas of the ROM are selected by connecting to the memory side data bus 6 and controlling the remaining address terminals. By switching the signals of the ROM terminals A8 and A9, up to four In all of the multiplier embodiments listed above, the bit width of the data bus is B'bit, but it does not necessarily have to be that way, and the data bus on the CPU side The bit width may be different between the bus and the memory side data bus.

In addition, since the present invention speeds up only the process of calculating the weighted average of errors in equation (1), equation (2)
The present invention can also be used when the minimum average error method is applied to multilevel processing of three or more values instead of binary conversion by changing the parts of equations 1 to (4).

〔Effect of the invention〕

In the present invention, a constant multiplication/division unit is provided between the central processing unit and the data storage unit, and the data output from the data storage unit is directly subjected to constant multiplication processing and transmitted to the central processing unit, thereby minimizing the average error. The time spent on constant multiplication, which takes the most time in law processing, is reduced to almost zero, significantly speeding up processing.

[Brief explanation of drawings]

Figure 1 is a diagram clearly showing the groove bottom of the present invention, Figure 2 is a diagram showing an embodiment of the present invention, Figures 3 to 9 are examples of weight masks used in the minimum average error method. The figures shown in FIGS. 10 to 16 are examples of multipliers used in the present invention. that's all

Claims (1)

[Claims] a central processing unit having an arithmetic function, a peripheral control function, and an external data input/output function; a data storage unit in which data is written and read according to control from the central processing unit; It is located in the middle of a data transmission path between data storage units, and when the central processing unit reads data from the data storage unit, the data output from the data storage unit to the central processing unit is transmitted from the central processing unit to the data storage unit. a constant multiplier/divider having a function of transmitting data processed by multiplying by a constant determined by an instruction to the central processing unit, and the data storage unit includes:
A high-speed image processing device using the minimum average error method, characterized in that error data of the minimum average error method is stored.