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JPS61241731A - Smectic liquid crystal device - Google Patents

Smectic liquid crystal device

Info

Publication number
JPS61241731A
JPS61241731A JP8365185A JP8365185A JPS61241731A JP S61241731 A JPS61241731 A JP S61241731A JP 8365185 A JP8365185 A JP 8365185A JP 8365185 A JP8365185 A JP 8365185A JP S61241731 A JPS61241731 A JP S61241731A
Authority
JP
Japan
Prior art keywords
liquid crystal
time
dark
voltage
bright
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8365185A
Other languages
Japanese (ja)
Other versions
JPH0431372B2 (en
Inventor
Takamasa Harada
隆正 原田
Masaaki Taguchi
田口 雅明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP8365185A priority Critical patent/JPS61241731A/en
Priority to DE8686302887T priority patent/DE3682610D1/en
Priority to EP19860302887 priority patent/EP0200427B1/en
Publication of JPS61241731A publication Critical patent/JPS61241731A/en
Publication of JPH0431372B2 publication Critical patent/JPH0431372B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3622Control of matrices with row and column drivers using a passive matrix
    • G09G3/3629Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/061Details of flat display driving waveforms for resetting or blanking
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2014Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To perform writing under a bright and dark conditions with a faster scanning speed which can be executed by one-frame scanning, by using alternating signals having a time width which is greater than the longer inverting time for a liquid crystal panel using a smectic liquid crystal compound, as write signals. CONSTITUTION:Since the liquid crystal molecule of a selected picture element receives the action of an electric field of a time of duration T1 which is longer than an inverting time tau1 of a pulse at the time of a voltage -V1 and shorter than another inverting time tau2 when the 1st mode signal is impressed, the picture element sufficiently inverts to a dark condition. When the 2nd mode signal is impressed, the liquid crystal molecule of the selected picture element receives an electric filed of a duration of time T2 which is longer than the inverting time tau1 of another pulse P3 at the time of a voltage -V. Therefore, the picture element once changes to a dark condition. However, since continuously impressed pulses P4 have a time width T2 which is longer then the inverting time tau2 from a dark condition to a bright condition under a voltage V1, the liquid crystal molecule is inverted from the dark condition written by the pulse P3 and writes a bright condition. Therefore, writing of the dark and bright conditions can be executed at a very high speed of hundreds microseconds mus.

Description

【発明の詳細な説明】 (技術分野) 本発明は、カイラルスメクティック液晶装置、より詳細
にはスメクティック液晶表示パネルの駆動回路に関する
TECHNICAL FIELD The present invention relates to a chiral smectic liquid crystal device, and more particularly to a drive circuit for a smectic liquid crystal display panel.

(従来技術) 近年、カイラルスメクティックC相を使用した液晶装置
は、高速応答性と記憶保持性を持つディスプレイ装置や
、カメラ用、プリンタ用の光シャッタとして注目されて
いる。
(Prior Art) In recent years, liquid crystal devices using chiral smectic C phase have attracted attention as display devices with high-speed response and memory retention, and optical shutters for cameras and printers.

このカイラルスメクティックC相を持つ強誘電性液晶化
合物としては、例えば、2−メチブチルP−[(P−n
−デシロキシベンジリデン)アミノ]が広く知られてお
り、その液晶分子は、第8図に示したように一定の方位
角ψを持って層り8、L2.L3.L4毎に捩れた螺旋
構造を採って配列している。
As a ferroelectric liquid crystal compound having this chiral smectic C phase, for example, 2-methybutyl P-[(P-n
8, L2. L3. They are arranged in a twisted spiral structure for each L4.

ところで、このカイラルスメクテイックC相を持つ液晶
化合物をその螺旋周期(通常数gm)よりも小さい間隙
(例えば1ルm程度)を持つ2枚の基板B、Hの間に注
入して液晶セルを構成すると(第9図イ)、液晶分子は
、螺旋構造を消失して分子軸を基板B、Hに平行にして
層の法線方向から時計回りに角度θ傾むいたドメインと
1反時計回りに0つまり一〇傾むいたドメインを混存し
た状態を持つとともに(同図口)、分子軸に垂直な方向
の電気双極子を備えている。
By the way, a liquid crystal cell is produced by injecting this liquid crystal compound having a chiral smectic C phase between two substrates B and H having a gap (for example, about 1 m) smaller than the helical period (usually several gm). (Fig. 9A), the liquid crystal molecules lose their helical structure and have a domain whose molecular axis is parallel to substrates B and H, tilted at an angle θ clockwise from the layer normal direction, and one counterclockwise domain. It has a mixed state of domains that are tilted by 0 or 10 degrees around the molecule (see figure), and also has an electric dipole in the direction perpendicular to the molecular axis.

このため、一方のドメインが基板B、Hに対して上向き
の電気双極子を持つと、他方のドメインは下向きの電気
双極子を持つことになり、したがって基板8.8間に電
界を印加すると、全ての液晶分子は、層の法線方向から
十〇もしくは−θのいずれか一方に傾いた位置に揃い、
また逆向きの電界を印加すると、液晶分子も反転して一
〇もしくは十〇傾むいた位置に一斉に揃った状態で配列
する。
Therefore, if one domain has an electric dipole pointing upwards with respect to the substrates B, H, the other domain will have an electric dipole pointing downwards, so when an electric field is applied between the substrates 8.8, All liquid crystal molecules are aligned at a position tilted either 10 degrees or -θ from the normal direction of the layer,
When an electric field in the opposite direction is applied, the liquid crystal molecules are also reversed and aligned all at once at positions tilted by 10 or 10 degrees.

このセルの両面に偏光板を配設して電界を印加すると、
液晶分子の移動により明状態や暗状態が生じて表示パネ
ルや光シャッタとしての機能を持たせることができる(
第1θ図)、このように構成した液晶パネルは、マイク
ロ秒台という非常に速い応答速度と、一旦表示したパタ
ーンを電界除去後も保持するという優れた特性を持って
いる。
When polarizing plates are placed on both sides of this cell and an electric field is applied,
The movement of liquid crystal molecules creates bright and dark states, allowing it to function as a display panel or optical shutter (
(Fig. 1θ), the liquid crystal panel constructed in this manner has an extremely fast response speed on the order of microseconds, and has the excellent property of retaining the pattern once displayed even after the electric field is removed.

特に、この記憶保持性は駆動電力を節約することができ
るという点では非常に宥用な特性ではあるが1反面にお
いて表示内容の変更時に暗状態の書込みと明状態の書込
みを別々のフレーム走査で行なう゛ことが必要となり、
表示パターンの変更に時間を要するという問題がある。
In particular, this memory retention property is a very acceptable characteristic in terms of saving drive power; It becomes necessary to do
There is a problem in that it takes time to change the display pattern.

(目的) 本発明は、このような問題に鑑み、明状態と暗状態の書
込みを1フレーム走査で実行することができる走査速度
の速い新規なスメクティック液晶装置を提供することを
目的とする。
(Objective) In view of the above-mentioned problems, an object of the present invention is to provide a novel smectic liquid crystal device with a high scanning speed and capable of writing in a bright state and a dark state in one frame scan.

(発明の概要) すなわち、本発明が特徴とするところは、一方の基板に
一軸配向を、他方の基板にランダム水平配向を施すとと
もに、前記空間の間隙を強誘電性カイラルスメクティッ
ク液晶化合物の螺旋ピッチ以下にしてスメクティック液
晶パネルを構成する一方に、前記液晶化合物の第1の反
転時間と第2の反転時間の間の時間幅を持つ交番信号と
、前記反転時間の長い方より大きい時間幅を持つ交番信
号を選択的に印加するようにした点にある。
(Summary of the Invention) That is, the present invention is characterized in that one substrate is uniaxially aligned, the other substrate is randomly aligned horizontally, and the gap in the space is formed by a helical pitch of a ferroelectric chiral smectic liquid crystal compound. A smectic liquid crystal panel is configured as follows: an alternating signal having a time width between the first inversion time and the second inversion time of the liquid crystal compound; and an alternating signal having a time width larger than the longer inversion time of the liquid crystal compound. The point is that the alternating signal is applied selectively.

(構成) そこで、以下に本発明の詳細を図示した実施例に基づい
て説明する。
(Structure) Therefore, details of the present invention will be described below based on illustrated embodiments.

第1図は、本発明に使用するスメクティック液晶装置の
一実施例を示すものであって、図中符号lは、液晶表示
パネルを構成する一方の基板で、透明導電性材料により
セグメント電極1a、1a、1a・・・・が形成された
ガラス等の電気絶縁性透明板1bの表面に印刷やディッ
ピングによってポリイミドの薄膜を設けて基板1の面方
向の全ての向きに均一な配向性を持つランダム水平配向
膜層1cを形成して構成されている(第2図イ)、2は
、液晶表示パネルを構成する他方の基板で、セグメント
電極1a、1a、1a・・・・と直交するようにコモン
電極2a、2a、2a・・・・が形成された電気絶縁性
透明板2bの表面にポリイミドの薄膜を設け、この薄膜
の表面を一方向にラビング処理を行なって一方向だけの
配向を付与した一軸配向膜層2cを形成して構成されて
いる(第2図口)、これら2枚の基板1.2は、液晶化
合物の螺旋ピッチよりも小さい間隙を持ってランダム水
平配向膜層ICと一軸配向膜層2c 2 Cを対向させ
て平行に配置され、2枚の基板l、2間にS−4−0(
2−メチル)プチルーレゾルシリデンー4−アルキルn
−チクチルアニリンと P−n−オクチルフェニル−Po−6−メチルオクチル
オキシベンゾエート を等率混合してなる強誘電性力イラルスメクティック液
晶化合物3を充填し、基板周囲をシール剤により封止し
てセル構造体に形成して表示パネル6に構成されている
。なお、図中符号4.5は、基板の表面に配置された偏
光板をそれぞれ示す。
FIG. 1 shows an embodiment of a smectic liquid crystal device used in the present invention, and reference numeral l in the figure indicates one substrate constituting a liquid crystal display panel, and segment electrodes 1a, made of transparent conductive material, A thin film of polyimide is provided by printing or dipping on the surface of an electrically insulating transparent plate 1b such as glass on which 1a, 1a, etc. are formed, and a polyimide thin film is provided on the surface of the electrically insulating transparent plate 1b, which has uniform orientation in all directions along the surface of the substrate 1. 2 is the other substrate constituting the liquid crystal display panel, which is formed by forming a horizontal alignment film layer 1c (FIG. 2A). A polyimide thin film is provided on the surface of the electrically insulating transparent plate 2b on which the common electrodes 2a, 2a, 2a, . . . are formed, and the surface of this thin film is rubbed in one direction to impart orientation in only one direction. These two substrates 1.2 are composed of a random horizontal alignment film layer IC and a random horizontal alignment film layer 2c with a gap smaller than the helical pitch of the liquid crystal compound. The uniaxial alignment film layers 2c 2C are arranged in parallel to face each other, and S-4-0 (
2-Methyl) butyl resol cylidene-4-alkyl n
- A ferroelectric smectic liquid crystal compound 3 made by mixing equal proportions of thictylaniline and P-n-octylphenyl-Po-6-methyloctyloxybenzoate is filled, and the periphery of the substrate is sealed with a sealant. The display panel 6 is formed by forming a cell structure. Note that reference numerals 4.5 in the figure each indicate a polarizing plate disposed on the surface of the substrate.

このように構成した液晶パネルの電極に電圧を印加して
ドメインの反転速度を調べると、第3図に示したように
同一レベルの電圧が印加されたとき、明状態から暗状態
に変化する速度r1 と、暗状態から明状態に変化する
速度7:2が異なり1両者間に応答時間差Δτが発生す
る。
When voltage is applied to the electrodes of the liquid crystal panel configured in this way and the domain reversal speed is investigated, as shown in Figure 3, when the same level of voltage is applied, the speed at which the domain changes from a bright state to a dark state is r1 and the rate of change from the dark state to the bright state (7:2) are different, and a response time difference Δτ occurs between the two.

本発明は、この表示状態の切換わり時の時間差Δrを積
極的に利用して明状態の書込みと、暗状態の書込みを同
時に実行するようにしたものである。
The present invention actively utilizes the time difference Δr at the time of switching the display state to execute writing in the bright state and writing in the dark state at the same time.

そこで、次に本発明に係る駆動回路の詳細を実施例に基
づいて説明する。
Next, details of the drive circuit according to the present invention will be explained based on an embodiment.

第4図は本発明の一実施例を示すものであって、図中符
号7は、上述したスメクティック液晶パネル6のコモン
電極2a、2a、2a・・・・に接続するコモン電極駆
動回路、8は、セグメント電極1a、la、la・・・
・に接続するセグメント電極駆動回路で、線順次走査時
に書込状態に対応して第1モードもしくは第2モードの
電界を、また非選択時には第3モードの電界を画素に印
加するように構成されている。
FIG. 4 shows an embodiment of the present invention, in which reference numeral 7 denotes a common electrode drive circuit 8 connected to the common electrodes 2a, 2a, 2a, . . . of the above-mentioned smectic liquid crystal panel 6. are segment electrodes 1a, la, la...
A segment electrode drive circuit connected to the segment electrode drive circuit is configured to apply an electric field of the first mode or the second mode to the pixel according to the write state during line sequential scanning, and apply an electric field of the third mode to the pixel when not selected. ing.

すなわち、画素選枳時に。That is, during pixel selection.

■電圧1v11で、明状態から暗状態に変化するに要す
る時間で1 と暗状態から明状態に変化するに要する時
間で2の間の時間幅T1を持つ負方向のパルスP1と(
第5図イ)、電圧1vtlで時間幅T1の正方向のパル
スP2からなる暗状態書込信号、及び電圧IVt/Nl
で交番する維持信号からなる第1モード信号(同図口)
、■同一レベルの電圧Ivtlで暗状態から明状態に変
化するに要する時間で2以上の時間幅T2の負方向のパ
ルスP3と(同図へ)、電圧1v11で時間幅T2の正
方向のパルスP4からなる明状態書込信号と、及び維持
信号からなる第2モード信号(ニ)、 非選択時に ■液晶分子に反転を生じさせない電圧1v1/N1と時
間幅を持った交番信号からなる第3モード信号(ホ) を選択的に出力するように構成されている。
■At a voltage of 1v11, a negative direction pulse P1 with a time width T1 between 1, which is the time required to change from a bright state to a dark state, and 2, which is the time required to change from a dark state to a bright state;
Figure 5 a), a dark state write signal consisting of a positive direction pulse P2 with a voltage of 1vtl and a time width of T1, and a voltage IVt/Nl.
The first mode signal consists of a maintenance signal that alternates between
, ■ A negative direction pulse P3 with a time width T2 of 2 or more in the time required to change from a dark state to a bright state at the same level of voltage Ivtl (see the same figure), and a positive direction pulse with a time width T2 at a voltage 1v11. A bright state write signal consisting of P4, and a second mode signal (d) consisting of a sustain signal, and a third mode signal (d) consisting of an alternating signal with a voltage 1v1/N1 and a time width that does not cause inversion in liquid crystal molecules when not selected. It is configured to selectively output a mode signal (E).

次に、こうのようにした装置の動作について説明する。Next, the operation of the device thus constructed will be explained.

電極1a、2aに電界を作用させない状態では、液晶分
子がその螺旋ピッチ以下という狭い間隙に封入されるこ
とにより、液晶分子の一端がランダム水平配向膜層Lc
によりに捕捉されてつりも面方向にフリーな状態の下で
、液晶分子の他端が一軸配向膜層2Cによって1つの方
向へのバイアスを与えられる。これにより、基板l、2
に充填されている全ての液晶分子は、一方向に揃えられ
て何らのパターンを現出することなくパネル面全体を一
様な光学濃度に維持して均一なバックグラウンドを形成
する。
When no electric field is applied to the electrodes 1a and 2a, the liquid crystal molecules are enclosed in a narrow gap that is less than the helical pitch, so that one end of the liquid crystal molecules is aligned with the random horizontal alignment film layer Lc.
Under the condition that the liquid crystal molecules are captured by and free in the plane direction, the other ends of the liquid crystal molecules are biased in one direction by the uniaxial alignment film layer 2C. As a result, the substrate l, 2
All the liquid crystal molecules filled in the panel are aligned in one direction to maintain a uniform optical density over the entire panel surface without revealing any pattern, thereby forming a uniform background.

このような状態において、第1モード信号を印加すると
、選択画素の液晶分子は、パルスP8の電圧−vIにお
ける反転時間で1より長く、かつ反転時間で2より短い
継続時間T1の電界の作用を受けるため、十分に暗状態
に反転する。この反転後にパルスP2が印加されると、
このパルスP2の時間幅TIが暗状態から明状態に切換
わる。
In this state, when the first mode signal is applied, the liquid crystal molecules of the selected pixel are affected by the electric field whose duration T1 is longer than 1 in the inversion time and shorter than 2 in the inversion time at the voltage -vI of the pulse P8. It is inverted to a sufficiently dark state to receive light. When pulse P2 is applied after this reversal,
The time width TI of this pulse P2 switches from a dark state to a bright state.

時間τ2より短いため、選択画素の液晶分子は、明状態
に反転することができず、暗状態、つまりパルスP、に
よる書込み状態を保持する。この書込み信号の後に印加
される維持信号により、選択画素の液晶分子は、暗状態
の位置に動的に保持される。
Since the time is shorter than τ2, the liquid crystal molecules of the selected pixel cannot be inverted to the bright state and maintain the dark state, that is, the state written by the pulse P. A sustain signal applied after this write signal dynamically holds the liquid crystal molecules of the selected pixel in a dark state position.

第2モード信号を印加すると、選択画素の液晶分子は、
パルスP3の電圧−■における反転時間で!より長い継
続時間T2の電界の作用を受けるため、一旦、暗状態に
変化する。ところが、引続き印加されるパルスP4は、
この電圧vIでの暗状態から明状態への反転時間で2よ
り長い時間幅T2を持っているため、液晶分子は、パル
スP3によっ、て書込まれた暗状態から反転させられて
明状態を書込むことになる。この書込み信号の後に印加
される維持信号により、選択画素の液晶分子は、明状態
に動的に保持される。
When the second mode signal is applied, the liquid crystal molecules of the selected pixel are
At the inversion time at voltage -■ of pulse P3! Since it is affected by the electric field with a longer duration T2, it temporarily changes to a dark state. However, the pulse P4 that is subsequently applied is
Since the inversion time from the dark state to the bright state at this voltage vI has a time width T2 longer than 2, the liquid crystal molecules are inverted from the dark state written by the pulse P3 to the bright state. will be written. A sustain signal applied after this write signal dynamically maintains the liquid crystal molecules of the selected pixel in a bright state.

これにより、数百終秒台という非常に速い速度で暗状態
の書込みと、明状態の書込みを実行することができる。
As a result, writing in the dark state and writing in the bright state can be executed at extremely high speeds of several hundreds of seconds.

言うまでもなく、上述の過程においては、液晶分子は、
電圧レベルと時間幅が同一の電圧を交互に受けるため、
画素に残留電荷が発生することはない。
Needless to say, in the above process, the liquid crystal molecules
Since voltages with the same voltage level and duration are alternately applied,
No residual charge is generated in the pixel.

以下、このように、書込むべき状態に対応させて第1モ
ード信号か第2モード信号のいずれか一方を選択して暗
状態と明状態を1フレーム走査により書込むことができ
る。
Hereinafter, in this way, either the first mode signal or the second mode signal is selected in accordance with the state to be written, and the dark state and bright state can be written by scanning one frame.

なお、この実施例においては、パターン表示後に駆動電
圧のl/Nのピーク値を持つ交番電圧を印加して表示内
容を保持するようにしているが、液晶分子は、ランダム
水平配向膜層ICの新たな1つの配向軸により捕捉され
るため、交番電圧の印加を除去しても液晶分子の向きが
保持されて表示内容を記憶することができる。
In this embodiment, after displaying the pattern, an alternating voltage having a peak value of l/N of the driving voltage is applied to maintain the displayed content. Since the liquid crystal molecules are captured by one new alignment axis, the orientation of the liquid crystal molecules is maintained even if the application of the alternating voltage is removed, and the display content can be stored.

また、この実施例においては、第1モード信号を暗状態
の書込みに、第2モード信号を明状態の書込みに使用し
ているが、対象となる液晶パネルの動作特性により適宜
変更されることは云うまでもない。
Further, in this embodiment, the first mode signal is used for writing in the dark state, and the second mode signal is used for writing in the bright state, but these may be changed as appropriate depending on the operating characteristics of the target liquid crystal panel. Needless to say.

第6図は、本発明の第2の実施例を示すもので、第7図
に示した電界印加時間に対する画素濃度変化を利用して
階調表示を行なうものであって、 画素選択時には、 ■ピーク電圧が1■11で、V1/2より先端側を明状
態から暗状態に変化するに要する時間τ1 と暗状態か
ら明状態に変化するに要する時間で2の間の時間幅Tx
により変調される負方向のパルスP5と(同図イ)、ピ
ーク電圧Iv+Iで1/2より先端側が時間幅Txによ
り変調される正方向のパルスP6からなる暗状態書込信
号及び、電圧1v□/Nlで交番する維持信号からなる
第4モード信号(ロ)、 ■ヒ−’) M、圧b(I Vt  I テ、 Iv+
 / 21より先端側を暗状態から明状態に変化するに
要する時間τ2よりも大きい時間幅Tyにより変調され
る負方向のパルスP7と(ハ)、ピーク電圧が1vエ 
1で、時間幅TVにより変調される正方向のパルスP8
からなる明状態書込信号及び、電圧(v t / Nl
で交番する維持信号からなる第5モード信号(ニ)を。
FIG. 6 shows a second embodiment of the present invention, in which gradation display is performed using the change in pixel density with respect to the electric field application time shown in FIG. 7. When selecting a pixel, When the peak voltage is 1■11, the time width Tx is between the time τ1 required for the tip side to change from the bright state to the dark state from V1/2 and the time required for the tip side to change from the dark state to the bright state 2.
A dark state write signal consisting of a negative direction pulse P5 modulated by (A in the same figure) and a positive direction pulse P6 whose tip side is modulated by a time width Tx from 1/2 at a peak voltage Iv+I, and a voltage 1v□ 4th mode signal consisting of a maintenance signal alternating with /Nl (B), ■H-') M, pressure b (I Vt I te, Iv+
/ 21, the pulse P7 in the negative direction is modulated by a time width Ty larger than the time τ2 required for the tip side to change from the dark state to the bright state (c), and the peak voltage is 1V.
1, the positive direction pulse P8 modulated by the time width TV
A bright state write signal consisting of a voltage (v t / Nl
A fifth mode signal (d) consisting of a sustain signal alternating with.

また非選択時には ■前述の第3モードの信号(ホ) を印加するように構成したものである。Also, when not selected ■Signal of the third mode mentioned above (E) It is configured to apply .

この実施例によれば、第4モード信号を印加すると、選
択画素の液晶分子は、このパルスP、の電圧−v+ と
時間幅Txに比例した濃度で暗状態側に変化する(第7
図)。このような状態においてパルスP6が印加される
と、暗状態から明状態に切換わるにはそのピーク電圧v
1の時間幅Tyが反転時間で2より短いため、液晶分子
は、暗状態の位置に移動することができず、パルスP5
により書込まれた濃度状態を保持する。この書込み信号
の後に印加される維持信号により、液晶分子は、その選
択された位置を中心として表示シ農度を動的に保持され
る。
According to this embodiment, when the fourth mode signal is applied, the liquid crystal molecules of the selected pixel change to the dark state side with a concentration proportional to the voltage -v+ of this pulse P and the time width Tx (seventh mode signal).
figure). When the pulse P6 is applied in such a state, the peak voltage v is required to switch from the dark state to the bright state.
Since the time width Ty of 1 is shorter than 2 in the reversal time, the liquid crystal molecules cannot move to the dark state position, and the pulse P5
The density state written by is retained. A sustain signal applied after this write signal causes the liquid crystal molecules to dynamically maintain the display intensity about the selected position.

第5モード信号を印加すると、液晶分子は、パルスP7
の時間幅Tyが反転時間で2より長いため、一旦、暗状
態に変化する。ところが、引続き印加されるパル72日
は、液晶分子を暗状態から明状態側に移動させるに十分
な時間幅Tyを持っているため、液晶分子は、パルスP
7によって書込まれた暗状態から明状態側に移動させら
れ、時間幅TVに比例した明度を書込むことになる。こ
れにより、数百ル秒台という非常に速い速度で階調性を
持つパターンの書込みを1工程で実行する。
When the fifth mode signal is applied, the liquid crystal molecules are exposed to the pulse P7
Since the time width Ty of the inversion time is longer than 2, the state changes once to a dark state. However, the 72nd day pulse that is continuously applied has a time width Ty that is sufficient to move the liquid crystal molecules from the dark state to the bright state side, so the liquid crystal molecules do not respond to the pulse P.
It is moved from the dark state written by 7 to the bright state side, and the brightness proportional to the time width TV is written. As a result, a pattern with gradation can be written in one step at a very high speed of several hundreds of seconds.

なお、この実施例においては、暗状態と明状態に階調性
を持たせているが、どちらか一方、例えば暗状態の書込
時だけに階調性を持たせても同様の作用を奏することは
明らかである。
Note that in this embodiment, gradation is given to the dark state and bright state, but the same effect can be achieved even if gradation is given only to one of them, for example, when writing in the dark state. That is clear.

なお、上述した強誘性を持ったスメクティック液晶の他
に、一般式 %式% により表わされるピリミジン系液晶化合物や2−メチイ
ルブチイルP−[(P−n−デシロキシベンジリデン)
アミン]等のカイラルスメクティック液晶化合物を使用
することができる。
In addition to the above-mentioned smectic liquid crystal having ferro-atductive properties, pyrimidine-based liquid crystal compounds represented by the general formula % and 2-methylbutyyl P-[(P-n-decyloxybenzylidene)
A chiral smectic liquid crystal compound such as amine] can be used.

なお、上述した実施例においては、基板の表面にポリイ
ミドにより一軸配向膜層、及びランダム水平配向膜層を
形成しているが、−軸配向膜を形成する材料としてはポ
リイミドの外、ポリビニールアルコール、弗素樹脂、シ
ラン等の有機膜や5f02斜方蒸着膜などが、また他方
の基板のランダム水平配向膜を形成する材料としてはポ
リイミドの外、エポキシ、ポリビニールアルコール、弗
素樹脂、ポリウレタン、シラン、フェノール。
In the above embodiment, a uniaxially oriented film layer and a random horizontally oriented film layer are formed using polyimide on the surface of the substrate, but in addition to polyimide, polyvinyl alcohol can be used as the material for forming the -axis oriented film. In addition to polyimide, materials for forming the random horizontal alignment film on the other substrate include epoxy, polyvinyl alcohol, fluororesin, polyurethane, silane, etc. Phenol.

尿素などの有機膜、5t02やM g F 2などを蒸
着してなる無機膜が使用できることを確認した。
It was confirmed that organic films such as urea and inorganic films formed by vapor-depositing 5t02, MgF2, etc. can be used.

(効果) 以上、説明したように本発明によれば、スメクティック
液晶化合物を用いた液晶パネルに、液晶化合物の第1の
反転時間と第2の反転時間の間の時間幅を持つ交番信号
、及び前記反転時間の長い方より大きい時間幅を持つ交
番信号を書込信号としたので、記憶保持性とバックグラ
ウンドの均一性を活しつつ、明状態と暗状態の書込みを
1フレーム走査期間内で行なうことができて、走査速度
の速い表示装置や光シャッタ等のカイラルスメクティッ
ク液晶表示装置を実現することができる。
(Effects) As described above, according to the present invention, an alternating signal having a time width between the first inversion time and the second inversion time of the liquid crystal compound is applied to a liquid crystal panel using a smectic liquid crystal compound, and Since the write signal is an alternating signal with a time width larger than the longer reversal time, writing of the bright state and dark state can be performed within one frame scanning period while taking advantage of memory retention and background uniformity. As a result, chiral smectic liquid crystal display devices such as display devices with high scanning speeds and optical shutters can be realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明に使用する液晶パネルの一実施例を示
す装置の斜視断面図、第2図(イ)6口)は、それぞれ
同上装置における基板のラビング方向を示す説明図、第
3図は、同上装置における印加電圧と応答速度を示す説
明図、第4図は、本発明の一実施例を示す装置のブロッ
ク図、第5図(イ)乃至(ホ)は、それぞれ回と装置に
おける動作を示す波形図、第6図(イ)乃至(ホ)は、
それぞれ本発明の他の実施例を示す波形図、第7図は、
電界印加時間と画素濃度の関係を示す説明図、第8図は
、カイラルスメクティック液晶の分子配列を示す模式図
、第9図(イ)(ロ)は、それぞれセル間隙を液晶分子
の螺旋ピッチ以下にしたときの分子の配列を示す模式図
、第10図は、スメクティック液晶のドメインと偏光の
関係を示す説明図である。 1・・・・基板 1a・・・・電気絶縁性透明板IC・
・・・ランダム水平配向膜層 2・・・・基板 2a・・・・電気絶縁性透明板2C・
・・・−軸配向膜層
FIG. 1 is a perspective cross-sectional view of an apparatus showing one embodiment of the liquid crystal panel used in the present invention, FIG. The figure is an explanatory diagram showing the applied voltage and response speed in the same device as above, FIG. 4 is a block diagram of the device showing one embodiment of the present invention, and FIGS. The waveform diagrams in FIGS. 6(A) to 6(E) show the operation in
Waveform diagrams and FIG. 7 each showing other embodiments of the present invention are as follows:
An explanatory diagram showing the relationship between electric field application time and pixel concentration, Figure 8 is a schematic diagram showing the molecular arrangement of chiral smectic liquid crystal, and Figures 9 (a) and (b) respectively show cell gaps below the helical pitch of liquid crystal molecules. FIG. 10 is an explanatory diagram showing the relationship between domains of smectic liquid crystal and polarized light. 1... Substrate 1a... Electrically insulating transparent plate IC.
... Random horizontal alignment film layer 2 ... Substrate 2a ... Electrically insulating transparent plate 2C.
...-Axis alignment film layer

Claims (1)

【特許請求の範囲】[Claims] 表面に一軸配向を施した基板と、表面にランダム水平配
向を施した基板を配向面側を対向させて平行に配設し、
2枚の基板により形成された空間に強誘電性カイラルス
メクティック液晶化合物を封入するとともに、前記空間
の間隙を前記液晶化合物の螺旋ピッチ以下に制限してな
るスメクティック液晶パネル、及び前記液晶化合物の第
1の反転時間と第2の反転時間の間の時間幅を持つ交番
信号と、前記反転時間の長い方より大きい時間幅を持つ
交番信号を選択的に出力する回路手段からなるスメクテ
ィック液晶装置。
A substrate with uniaxial orientation on the surface and a substrate with random horizontal orientation on the surface are arranged in parallel with the orientation surfaces facing each other,
A smectic liquid crystal panel in which a ferroelectric chiral smectic liquid crystal compound is sealed in a space formed by two substrates, and a gap in the space is limited to a helical pitch or less of the liquid crystal compound; 1. A smectic liquid crystal device comprising circuit means for selectively outputting an alternating signal having a time width between a second inversion time and a second inversion time, and an alternating signal having a time width larger than the longer inversion time.
JP8365185A 1985-04-19 1985-04-19 Smectic liquid crystal device Granted JPS61241731A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP8365185A JPS61241731A (en) 1985-04-19 1985-04-19 Smectic liquid crystal device
DE8686302887T DE3682610D1 (en) 1985-04-19 1986-04-17 ELECTRO-OPTICAL DEVICE WITH CHIRAL SMECTIC LIQUID CRYSTAL AND METHOD FOR CONTROLLING THE SAME.
EP19860302887 EP0200427B1 (en) 1985-04-19 1986-04-17 Chiral smectic liquid crystal electro-optical device and method of driving same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8365185A JPS61241731A (en) 1985-04-19 1985-04-19 Smectic liquid crystal device

Publications (2)

Publication Number Publication Date
JPS61241731A true JPS61241731A (en) 1986-10-28
JPH0431372B2 JPH0431372B2 (en) 1992-05-26

Family

ID=13808352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8365185A Granted JPS61241731A (en) 1985-04-19 1985-04-19 Smectic liquid crystal device

Country Status (3)

Country Link
EP (1) EP0200427B1 (en)
JP (1) JPS61241731A (en)
DE (1) DE3682610D1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63281136A (en) * 1987-05-13 1988-11-17 Canon Inc Liquid crystal device
US5132818A (en) * 1985-12-25 1992-07-21 Canon Kabushiki Kaisha Ferroelectric liquid crystal optical modulation device and driving method therefor to apply an erasing voltage in the first time period of the scanning selection period
US5440412A (en) * 1985-12-25 1995-08-08 Canon Kabushiki Kaisha Driving method for a ferroelectric optical modulation device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5010328A (en) * 1987-07-21 1991-04-23 Thorn Emi Plc Display device
US6268839B1 (en) * 1998-05-12 2001-07-31 Kent State University Drive schemes for gray scale bistable cholesteric reflective displays

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629919B2 (en) * 1982-04-16 1994-04-20 株式会社日立製作所 Liquid crystal element driving method
EP0106386A3 (en) * 1982-09-23 1985-03-13 BBC Brown Boveri AG Method of triggering a multiplexable bistable liquid crystal display
US4655561A (en) * 1983-04-19 1987-04-07 Canon Kabushiki Kaisha Method of driving optical modulation device using ferroelectric liquid crystal
AU584867B2 (en) * 1983-12-09 1989-06-08 Seiko Instruments & Electronics Ltd. A liquid crystal display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5132818A (en) * 1985-12-25 1992-07-21 Canon Kabushiki Kaisha Ferroelectric liquid crystal optical modulation device and driving method therefor to apply an erasing voltage in the first time period of the scanning selection period
US5440412A (en) * 1985-12-25 1995-08-08 Canon Kabushiki Kaisha Driving method for a ferroelectric optical modulation device
JPS63281136A (en) * 1987-05-13 1988-11-17 Canon Inc Liquid crystal device

Also Published As

Publication number Publication date
EP0200427B1 (en) 1991-11-27
EP0200427A1 (en) 1986-11-05
JPH0431372B2 (en) 1992-05-26
DE3682610D1 (en) 1992-01-09

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