JPS60257594A - Multilayer printed circuit board - Google Patents
Multilayer printed circuit boardInfo
- Publication number
- JPS60257594A JPS60257594A JP11526584A JP11526584A JPS60257594A JP S60257594 A JPS60257594 A JP S60257594A JP 11526584 A JP11526584 A JP 11526584A JP 11526584 A JP11526584 A JP 11526584A JP S60257594 A JPS60257594 A JP S60257594A
- Authority
- JP
- Japan
- Prior art keywords
- layer material
- multilayer printed
- inner layer
- fluororesin
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Reinforced Plastic Materials (AREA)
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔技術分野〕
本発明は電気機器、電子機器、計算機等に用いられる多
層プリント配線板に関すふものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a multilayer printed wiring board used in electrical equipment, electronic equipment, computers, etc.
従来、多層プリント配線板は回路を形成した内層材の上
面及び又は下面にエポキシ樹脂、フェノール樹脂、不飽
和、ポリエステM樹脂等の熱硬化性樹脂をガラス布、ガ
ラス不犠布1紙、ガラスベーパー等の基材に含浸させた
樹脂含浸基材を所要枚数配設してから片面金属張積層板
や金属箔等の外層、材を配設、一体化して得られるもの
であるが、高周波特性1寸法安定性、ドリル開孔時の耐
スミアー性、熱時ピーM性が悪いという問題があった。Conventionally, in multilayer printed wiring boards, a thermosetting resin such as epoxy resin, phenol resin, unsaturated resin, or polyester M resin is applied to the upper and/or lower surfaces of the inner layer material on which the circuit is formed using glass cloth, glass non-sacrificial cloth, or glass vapor. It is obtained by disposing the required number of resin-impregnated base materials, and then disposing and integrating an outer layer or material such as a single-sided metal-clad laminate or metal foil. There were problems with poor dimensional stability, smear resistance during drilling, and poor peel-off resistance when hot.
本発明の目的とするところは高周波特性1寸法安定性、
トリv開孔時の耐スミア−性、熱時ピーV性に優れた多
層プリント配線板を提供することにある。The objectives of the present invention are high frequency characteristics (1) dimensional stability;
It is an object of the present invention to provide a multilayer printed wiring board that has excellent smear resistance when opening a tri-V hole and excellent P-V property when heated.
本発明は回路を有する内層材の上面及び又は下面に複数
の融点の異なる接着用フッ素樹脂層を介して外層材を配
設又は、更に内層材を配設後、複数の融点の異なる接着
用フッ素樹脂層を介するどとを所要回数反復して外層材
を配設、一体化したことを特徴とする多層プリント配線
板のため、フッ素系樹脂の優れた高周波特性を活用でき
、又熱可塑性であるため寸法安定性が向上し且つフッ素
系樹脂の優れた耐熱性を活用し耐スミアー性、熱時ピー
p性を改良することができ更に複数の融点の異なるフッ
素樹脂を用いることにより成形性を向上させることがで
きたもので、以下本発明の詳細な説明する。In the present invention, an outer layer material is disposed on the upper surface and/or lower surface of an inner layer material having a circuit through a plurality of adhesive fluororesin layers having different melting points, or after the inner layer material is further disposed, a plurality of adhesive fluororesin layers having different melting points are disposed on the upper surface and/or lower surface of an inner layer material having a circuit. This is a multilayer printed wiring board characterized by the outer layer material being placed and integrated by repeating the process of inserting the resin layer a required number of times, making it possible to take advantage of the excellent high-frequency properties of fluorine-based resin, and also being thermoplastic. Therefore, dimensional stability is improved, and by utilizing the excellent heat resistance of fluororesin, smear resistance and peak resistance under heat can be improved.Moldability is also improved by using multiple fluororesins with different melting points. The present invention will now be described in detail.
本発明に用いる回路を有する内層材としては、片面回路
内層材、両面回路内層材の各れをも用いることができ、
更に内層材の回路形成側に所要枚数の接着用フッ素系樹
脂層を介して回路形成した内層材を配設することにより
更に多層のプリント配線板とすることもできるものであ
る。接着用フッ素系樹脂層としては樹脂シート、樹脂フ
ィルム、樹脂含浸基材等を任意組合せて用いることがで
き、フッ素系樹脂としては四フッ化エチレン樹脂、四フ
ッ化エチレンパーフルオロビニVエーテV1「 共重合
体、四フッ化エチレン六フッ化プロピレン1 共重合体
、四フッ化エチレンエチレン共重合体等のフッ素系樹脂
全般を用いることができるが複数の融点の異なるフッ素
系樹脂を組合せて用いる必要がある。融点の差は好まし
くは40 ’(以内であることが回路に対する影響を最
少にし且つ気泡残留をなくする上で望まし−ことである
。As the inner layer material having a circuit used in the present invention, either a single-sided circuit inner layer material or a double-sided circuit inner layer material can be used,
Further, by disposing an inner layer material on which a circuit is formed on the circuit forming side of the inner layer material via a required number of adhesive fluororesin layers, a printed wiring board with even more layers can be obtained. As the adhesive fluororesin layer, a resin sheet, a resin film, a resin-impregnated base material, etc. can be used in any combination, and examples of the fluororesin include tetrafluoroethylene resin, tetrafluoroethylene perfluorovinyl V-ete V1. All fluororesins such as copolymer, tetrafluoroethylene hexafluoropropylene 1 copolymer, tetrafluoroethylene ethylene copolymer, etc. can be used, but it is necessary to use a combination of multiple fluororesins with different melting points. The difference in melting point is preferably within 40' to minimize the influence on the circuit and eliminate residual bubbles.
基材としてはガラス、アスベスト等の無機[6゜やポリ
エステル、ポリアミド、ポリビニVアルコー1v、ポリ
アクリル等の有機合成繊維や木綿等の天然繊維からなる
織布、不織布、マット、寒冷紗或は紙又はこれらの組合
せ基材等であるが好ましくは寸法安定性に優れたガラス
布を用−ることが望ましい。外層材としては片面金属張
積層板や銅、アルミニウム、ステンレス鋼、i鍮、 鉄
、ニッケル等の単独又は合金からなる金属箔を用いるも
のである。又接着用フッ素系樹脂層については好ましく
は回路部及び金属箔に接する層はフッ素糸樹脂フイMム
であることが望まし込ことである。The base material may be glass, inorganic fabrics such as asbestos [6°, polyester, polyamide, polyvinyl V alcohol 1v, woven fabrics made of organic synthetic fibers such as polyacrylic, natural fibers such as cotton, nonwoven fabrics, mats, cheesecloth, paper, or Among these combination base materials, it is preferable to use glass cloth, which has excellent dimensional stability. As the outer layer material, a single-sided metal-clad laminate or a metal foil made of copper, aluminum, stainless steel, brass, iron, nickel, etc. alone or made of an alloy is used. Regarding the adhesive fluororesin layer, it is preferable that the layer in contact with the circuit portion and the metal foil be a fluororesin film M.
一体化手段についても特に限定するののではないが好ま
しくは積層加熱加圧方法によることが望ましいことであ
る。Although there are no particular limitations on the integration means, it is preferable to use a lamination heating and pressing method.
以下本発明を実施例にもとすいて説明する。The present invention will be explained below using examples.
実施例
両面に回路を形成した厚さ0.8 nのフッ素樹脂ガラ
ス積層板からなる内層材の上、下面に厚さ0.1絹の四
フッ化エチレンパーフVオロビニルエーテlし共重合体
ブイlレム(ダイキン工業株式会社製、商品名ネオフロ
ン、融点302〜310℃)2枚の間に厚さ0.1fl
の四フヮ化エチレン樹脂フイVム(ダイキン工業株式会
社製、商品名ポリフロン、融点327℃)1枚を挾んだ
接着用フッ素系樹脂層を介して厚さ0.0351!Il
lの銅箔を夫々配設し400℃、 4oK+q/dで6
0分間積層加熱成形して多層プリント配線板を得た。Example A 0.1-thick silk tetrafluoride ethylene perf V orovinyl ether copolymer buoy was placed on the top and bottom of the inner layer material consisting of a 0.8 nm thick fluororesin glass laminate plate with circuits formed on both sides. Rem (manufactured by Daikin Industries, Ltd., trade name NEOFLON, melting point 302-310°C) between two sheets with a thickness of 0.1 fl
Thickness of 0.0351! is sandwiched between one sheet of polytetrafluoroethylene resin film (manufactured by Daikin Industries, Ltd., trade name: Polyflon, melting point: 327°C) through adhesive fluororesin layers. Il
Copper foil of 1 is arranged respectively and 6 at 400℃, 4oK+q/d.
A multilayer printed wiring board was obtained by laminating and heating molding for 0 minutes.
従来例
実施例と同じ内層材の上、下面に厚さ0,1lffのエ
ポキシ樹脂含浸ガラス布3枚を夫々配設し、更に最外層
に厚さ0.035ffの銅箔を載置した積層体を170
℃、 50tL/dで90分間積層加熱成形して多層プ
リント配線板を得た。A laminate in which three sheets of epoxy resin-impregnated glass cloth with a thickness of 0.1 lff are placed on the top and bottom surfaces of the same inner layer material as in the conventional example, and a copper foil with a thickness of 0.035 ff is placed on the outermost layer. 170
A multilayer printed wiring board was obtained by laminating and heating molding at 50 tL/d at 50°C for 90 minutes.
実施例及び従来例の多層プリント配線板の高周波特性、
寸法安定性、耐スミアー性、熱時ピール性は第1表で明
白なように本発明の多1−プリント配線板の性能はよく
、本発明の優れていることを確認した。High frequency characteristics of the multilayer printed wiring board of the example and the conventional example,
As is clear from Table 1, the performance of the multi-printed wiring board of the present invention was good in terms of dimensional stability, smear resistance, and heat peelability, confirming the superiority of the present invention.
Claims (2)
の融点の異なる接着用フッ素系樹脂層を介して外層材を
配設又は、更に内層材を配設後、複数の融点の異なる接
着用フッ素系樹脂層を介すふことを所要回数反復して外
層材を配設、一体化したことを特徴とする多層プリント
配線板。(1) Arrange the outer layer material on the upper and/or lower surface of the inner layer material having a circuit via a plurality of adhesive fluororesin layers with different melting points, or further arrange the inner layer material and then bond the inner layer material with a plurality of different melting points. A multilayer printed wiring board characterized in that an outer layer material is arranged and integrated by repeating the process a required number of times through a fluororesin layer.
がフッ素系樹脂フィルムであることを特徴とする特許請
求の範囲第1項記載の多層プリント配線板。(2) The multilayer printed wiring board according to claim 1, wherein the fluororesin layer for adhesion to the circuit portion and the metal foil is a fluororesin film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11526584A JPS60257594A (en) | 1984-06-04 | 1984-06-04 | Multilayer printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11526584A JPS60257594A (en) | 1984-06-04 | 1984-06-04 | Multilayer printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60257594A true JPS60257594A (en) | 1985-12-19 |
Family
ID=14658388
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11526584A Pending JPS60257594A (en) | 1984-06-04 | 1984-06-04 | Multilayer printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60257594A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6347136A (en) * | 1986-08-15 | 1988-02-27 | 松下電工株式会社 | Manufacture of laminated board |
JPH03283492A (en) * | 1990-03-30 | 1991-12-13 | Hitachi Ltd | Multilayered printed circuit board and manufacture thereof |
-
1984
- 1984-06-04 JP JP11526584A patent/JPS60257594A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6347136A (en) * | 1986-08-15 | 1988-02-27 | 松下電工株式会社 | Manufacture of laminated board |
JPH03283492A (en) * | 1990-03-30 | 1991-12-13 | Hitachi Ltd | Multilayered printed circuit board and manufacture thereof |
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