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JPS6025159U - リ−ドフレ−ム - Google Patents

リ−ドフレ−ム

Info

Publication number
JPS6025159U
JPS6025159U JP1983117523U JP11752383U JPS6025159U JP S6025159 U JPS6025159 U JP S6025159U JP 1983117523 U JP1983117523 U JP 1983117523U JP 11752383 U JP11752383 U JP 11752383U JP S6025159 U JPS6025159 U JP S6025159U
Authority
JP
Japan
Prior art keywords
lead frame
external lead
bent
lead part
radius
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1983117523U
Other languages
English (en)
Other versions
JPS6336703Y2 (ja
Inventor
瑛一 綱島
Original Assignee
松下電子工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電子工業株式会社 filed Critical 松下電子工業株式会社
Priority to JP1983117523U priority Critical patent/JPS6025159U/ja
Publication of JPS6025159U publication Critical patent/JPS6025159U/ja
Application granted granted Critical
Publication of JPS6336703Y2 publication Critical patent/JPS6336703Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
図は本考案実施例を用いた回路構体断面図である。 1・・・・・・可撓性フィルム、2・・・・・・チップ
載置部、3・・・・・・外部リード部、4・・・・・・
半導体ICチップ、5・・・・・・金属細線、6・・・
・・・外囲樹脂体、7・・・・・・回路配線用基板、8
・・・・・・配線接続部。

Claims (1)

    【実用新案登録請求の範囲】
  1. 可撓性絶縁基体上に、金属箔の半導体チップ載置部およ
    び外部リード部を有し、前記外部リード部を曲げ半径0
    . 5771771以下で90°〜180°折り曲げた
    構造のリードフレーム。
JP1983117523U 1983-07-28 1983-07-28 リ−ドフレ−ム Granted JPS6025159U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983117523U JPS6025159U (ja) 1983-07-28 1983-07-28 リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983117523U JPS6025159U (ja) 1983-07-28 1983-07-28 リ−ドフレ−ム

Publications (2)

Publication Number Publication Date
JPS6025159U true JPS6025159U (ja) 1985-02-20
JPS6336703Y2 JPS6336703Y2 (ja) 1988-09-28

Family

ID=30270498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983117523U Granted JPS6025159U (ja) 1983-07-28 1983-07-28 リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS6025159U (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05211204A (ja) * 1991-11-29 1993-08-20 Akira Kitahara 表面実装電子部品
JPH06120411A (ja) * 1992-10-07 1994-04-28 Nec Corp 実装型パッケージ
JP2012094713A (ja) * 2010-10-27 2012-05-17 Shindengen Electric Mfg Co Ltd 樹脂封止型半導体装置及び弾性接続子

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05211204A (ja) * 1991-11-29 1993-08-20 Akira Kitahara 表面実装電子部品
JPH06120411A (ja) * 1992-10-07 1994-04-28 Nec Corp 実装型パッケージ
JP2012094713A (ja) * 2010-10-27 2012-05-17 Shindengen Electric Mfg Co Ltd 樹脂封止型半導体装置及び弾性接続子

Also Published As

Publication number Publication date
JPS6336703Y2 (ja) 1988-09-28

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