JPS60156280A - Sinusoidal pwm control transistor inverter - Google Patents
Sinusoidal pwm control transistor inverterInfo
- Publication number
- JPS60156280A JPS60156280A JP59010597A JP1059784A JPS60156280A JP S60156280 A JPS60156280 A JP S60156280A JP 59010597 A JP59010597 A JP 59010597A JP 1059784 A JP1059784 A JP 1059784A JP S60156280 A JPS60156280 A JP S60156280A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- current
- comparator
- command
- rectangular wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は正弦波PWM制御のトランジスタインバータ
に関する。交流電動機の可変速駆動を行う場合、電動機
電流を正弦波とする正弦波PWM制御のトランジスタイ
ンバータがよく用いられる。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sinusoidal PWM controlled transistor inverter. When variable speed driving of an AC motor is performed, a transistor inverter with sinusoidal PWM control that makes the motor current a sinusoidal wave is often used.
第1図にトランジスタインバータ1、相分のブロック図
を示すが、正弦波の電流指令と検出の電動機電流を比較
、偏差を得、これを正弦波制御電圧指令としてキャリヤ
三角波と比較し、先の電流指令に対応した電動mia流
を供給するよう、トランジスタをON、0FFIIJ罪
しインバータ出方電圧の平均値を正弦波とするものであ
る。すなわち、電流HPti器(1)を介し増幅された
正弦波電圧は比較器(2)にてキャリヤ三角波と比較さ
れ、電流指令に対応した幅のパルス波形を生成し、一方
のトランジスタ(3)のベース入力として、かつその反
転信号が他方トランジスタ(4)のベース入力としてそ
れぞれ使用される。なお、この上下トランジスタ(3)
、(4)のベース入力は、これらトランジスタ(3)、
<4)の双方がともに導通し電源′InIIBとなるの
を防ぐべく、OFFから’ONの立上りのタイミングを
ずらし若干のタイムラグを設けており(波形整形回路(
5)、(6)による)、トランジスタの一方が導通状態
になるタイミングは、他方のトランジスタが必らず不導
通の状態に切替ってかう後になるよう設定されている。Figure 1 shows a block diagram of the transistor inverter 1 and phase components. Compare the sine wave current command and the detected motor current, obtain the deviation, use it as a sine wave control voltage command, and compare it with the carrier triangular wave. In order to supply the electric current corresponding to the current command, the transistor is turned ON and 0FFIIJ, and the average value of the inverter output voltage is made into a sine wave. That is, the sine wave voltage amplified through the current HPti device (1) is compared with the carrier triangular wave in the comparator (2) to generate a pulse waveform with a width corresponding to the current command, and one of the transistors (3) is as the base input and its inverted signal as the base input of the other transistor (4), respectively. In addition, this upper and lower transistor (3)
, (4) are connected to these transistors (3),
In order to prevent both <4) from becoming conductive and becoming the power supply 'InIIB, the timing of the rise of 'ON from OFF is shifted to provide a slight time lag (waveform shaping circuit (
According to (5) and (6)), the timing at which one of the transistors becomes conductive is set so that the timing at which one of the transistors becomes conductive is always after the other transistor is switched to a non-conductive state.
第1図において、(7)はキャリヤ三角波を供給する発
振器、(8)は反転パルス波形を形成の符号変換器、(
9)、<10)はベースドライブ回路、(11)、<1
2)はトランジスタ(3)、(4)に逆並列接続のダイ
オード、(13)は電−流検出器、(14)は電動機負
荷の一相分、(15)、(16)は直流電源である。In Figure 1, (7) is an oscillator that supplies a carrier triangular wave, (8) is a sign converter that forms an inverted pulse waveform, (
9), <10) are base drive circuits, (11), <1
2) is a diode connected in antiparallel to transistors (3) and (4), (13) is a current detector, (14) is one phase of motor load, and (15) and (16) are DC power supplies. be.
第2図のタイムチ17−トは、キャリヤ三角波aと、電
流調節器(1)出力の正弦波制御電圧波形b1比較器(
2)出ノjの、第1のトランジスタ(3)ベース入力信
号のパルス波形c1とその反転波形の、第2の1〜ラン
ジスタ(4)ベース入力信号波形C2、をそれぞれ表わ
す。第3図のタイムチャートは、波形整形回路(5)、
<6)の入・出力パルス波形の関係を示すもので、出力
側のパルス波形立上りは入力のパルス波形より若干のタ
イムラグを有し、この結果、双方のトランジスタ(3)
、(4)の導通・不導通の切替わり時に必らずデッドタ
イムを生じ、双方ともOFFになる期間を備える。The time chart 17 in FIG. 2 shows the carrier triangular wave a and the sine wave control voltage waveform b1 of the current regulator (1) output from the comparator (
2) The pulse waveform c1 of the first transistor (3) base input signal and the second transistor (4) base input signal waveform C2, which is its inverted waveform, are respectively shown at output node j. The time chart in Figure 3 shows the waveform shaping circuit (5),
<6) shows the relationship between the input and output pulse waveforms; the rise of the pulse waveform on the output side has a slight time lag compared to the input pulse waveform, and as a result, both transistors (3)
, (4), a dead time always occurs when switching between conduction and non-conduction, and there is a period in which both are OFF.
このように、正弦波P W M I制御のトランジスタ
インバータでは、電源短絡の危険を防ぐため、これらト
ランジシスタの切替わり時双方共OFFになるデッドタ
イム区間を設けることが不可欠で、このことは、電動機
電流の減少しインバータ出力電圧平均値の低下する程、
その占める割合が増大し、制御不能領域の拡大となって
現われる。すなわら、この種インバータは無負荷とか軽
負荷の微少電流領域において制御性能の低下を来たし、
応答遅れ等の問題を発生する。In this way, in a sine wave PWM I controlled transistor inverter, in order to prevent the risk of power short circuit, it is essential to provide a dead time period in which both transistors are turned off when switching. As the motor current decreases and the average inverter output voltage decreases,
Its proportion increases, resulting in an expansion of the uncontrollable area. In other words, this type of inverter suffers from a decline in control performance in the micro current region of no load or light load.
This causes problems such as response delays.
ところで、第2図において電圧指令すに対応して電動機
電流が図示するd波形のような位相で流れたとJoれば
、負の領域では、図示する斜線区間 ゛でトランジスタ
(3)にON指令が与えられているに拘わらずダイオー
ド(11)に電流が流れており、また正の領域でも同じ
く破線区間でトランジスタ(4)にON指令が与えられ
るが実際の電動機電流はダイオード(12)を介して流
れることになる。すなわら、電動機電流の連続して、流
れている状態では、主回路トランジスタ(3)。By the way, if the motor current flows in a phase like the d waveform shown in the figure in response to the voltage command in FIG. Current flows through the diode (11) regardless of the current, and even in the positive region, an ON command is given to the transistor (4) in the dashed line section, but the actual motor current flows through the diode (12). It will flow. That is, in the continuous, flowing condition of the motor current, the main circuit transistor (3).
(4)に逆並列接続のダイオード(11)。Diode (11) connected in antiparallel to (4).
(12)が導通している期間においても←中tす、 −
〇N指令が与えられ、←す
゛ 導通し無駄な電力を消
費しまたトランジスタ(3)、(4)にON指令を供給
−4るベース入力回路にあってもトランジスタ(3)、
(4)のスイッチング動作の不必要なときに駆動されそ
の分電力損失を来たす。Even during the period when (12) is conducting, -
〇When an N command is given, ← Su゛ conducts, consuming wasted power, and also supplies an ON command to transistors (3) and (4).
The switching operation (4) is driven when it is unnecessary, resulting in power loss.
この発明は、上記に鑑み電流の連続して流れている状態
において、逆並列接続ダイオードの導通の際に主回路ト
ランジスタのON、OFF指令をalliL、主回路1
−ランジスタ及びそのベース駆動回路の電力損失を軽減
するとともに、上記キャリヤ三角波形−周期毎のデッド
タイムを電流位相の反転毎と、大幅に減少しようとする
もので、以下本発明を第3図、第4図に示す実施例に基
づき具体的に説明する。In view of the above, in a state where current is continuously flowing, when the anti-parallel connected diodes are conductive, the main circuit transistor is
- It is intended to reduce the power loss of the transistor and its base drive circuit, and to significantly reduce the dead time for each period of the carrier triangular waveform for each reversal of the current phase. This will be explained in detail based on the embodiment shown in FIG.
第3図において、(17)、(1B)、(19)ノ
が本発明に係る回路で、電、流指令■の極性を判別、ト
ランジスタを選択する主回路トランジスタ選択回路と、
インバータ出力電圧指令のキャリヤ波形と比較して得た
パルス波形を上記トランジスタ選択指令とAND演算さ
せるANDゲート、を新たに挿入したもので、その余の
構成は従来例と均等で同一符号で示した。In FIG. 3, (17), (1B), and (19) are circuits according to the present invention, including a main circuit transistor selection circuit for determining the polarity of the current command (■) and selecting a transistor;
A new AND gate has been inserted to perform an AND operation on the pulse waveform obtained by comparing the carrier waveform of the inverter output voltage command with the transistor selection command.The rest of the configuration is the same as the conventional example and is indicated by the same reference numerals. .
すなわち、この発明は正弦波電流指令lの極性を、若干
の立上り遅れを有しタイムラグを備えた矩形波形として
検出し、これをトランジスタON。That is, the present invention detects the polarity of the sine wave current command l as a rectangular waveform with a slight rise delay and a time lag, and turns on the transistor.
OFFの実際のパルス1波形に比較、AND演算を行い
、電流通路になるトランジスタのみにON。Compare and AND operation with the actual OFF pulse 1 waveform, and turn ON only the transistor that becomes the current path.
OFF指令を与え、他方分岐のトランジスタはOFF指
令となし、逆並列接続ダイオードの導通時に同一分岐ト
ランジスタの導通を阻止したことを特徴とする。It is characterized in that an OFF command is given to the transistors in the other branch, and conduction of the same branch transistors is prevented when the anti-parallel connected diodes are conductive.
第4図のタイムチャートにより説明すると、電流指令■
は、トランジスタ選択回路(17)によリ、その立上り
に若干のタイムラグを設けた正・負極性に対応する矩形
波e1.e2に変換され、かつ一方電流指令Iと電流帰
還信号Ifとが比較、電流調節器(1)を介して得られ
た電圧指令すの。To explain using the time chart in Figure 4, the current command ■
The transistor selection circuit (17) generates a rectangular wave e1. corresponding to positive and negative polarity with a slight time lag in its rise. e2, and on the other hand, the current command I and the current feedback signal If are compared, and the voltage command obtained through the current regulator (1) is compared.
キャリヤ三角波8との比較結果であるトランジスタON
、’OFF指令のパルス波形C@得る。このパルス波形
C及び反転波形と先の電流極性に対応の矩形波e1.e
2とのAND演算を行ない、得られた電流極性に応じた
パルス波形fllf2を各分岐のトランジスタ<3)、
(4)のON。Transistor ON which is the comparison result with carrier triangular wave 8
, 'Obtain the pulse waveform C@ of the OFF command. A rectangular wave e1.corresponding to the pulse waveform C and the inverted waveform and the previous current polarity. e
2, and the pulse waveform fllf2 corresponding to the obtained current polarity is applied to the transistor of each branch <3),
(4) ON.
OFF指令となし、その結果、上下トランジスタの一方
(3)がON、OFFされている間、他方分岐トランジ
スタ(4)はOFFのままであり、負倚電流はトランジ
スタ(3)とダイオード(12)、及びトランジスタ(
4)とダイオード<11)、の各組合せにより、正負極
性に応じて流れることになる。As a result, while one of the upper and lower transistors (3) is turned ON and OFF, the other branch transistor (4) remains OFF, and the negative current flows between the transistor (3) and the diode (12). , and transistor (
4) and a diode <11), the current flows depending on the positive and negative polarities.
電流指令の極性に対応のパルス波形al182は、その
立上りにタイムラグを設は若干のデッドタイムを生じる
ようにしているが、もちろんこれは従来例におけるキャ
リヤ三角波の半周期毎にデッドタイムを設けたこと、と
均等であり、上下トランジスタ(3)、(4)の短絡を
防ぐためにあり、電流の極性が反転し上下トランジスタ
の一方から他方へ切替わる際、トランジスタの双方が共
に導通状態になり電源短絡となるのを防ぐものである。The pulse waveform al182 corresponding to the polarity of the current command is designed to have a time lag at its rise, which causes a slight dead time, but of course this is due to the fact that a dead time is provided for every half cycle of the carrier triangular wave in the conventional example. , and are equal to each other, and are intended to prevent short circuits between the upper and lower transistors (3) and (4). When the polarity of the current is reversed and switches from one of the upper and lower transistors to the other, both transistors become conductive, resulting in a short circuit of the power supply. This is to prevent this from happening.
このように、正弦波PWM制御トランジスタインバータ
にあって、従来は、キャリヤ三角波の半周期毎にデッド
タイムを必要とし、そのため種々悪影響を及ぼしていた
が、この発明は、逆並列接続ダイオードの導通の間、そ
のトランジスタへのベース入力は与えないようにして、
上下トランジスタの一方のトランジスタをON、OFF
のパルス幅制御し、他力トランジスタをOFFのままと
したもので、更に上下トランジスタを切替える正弦波電
流指令位相反転時に、先のキャリヤ三角波 ′1の半周
開缶のデッドタイムと同様の、一方のトランジスタが完
全にOFFしたことを!ll認して後他方トランジスタ
をONとする電Sfl格回避のためのタイムラグ、を設
けたことを特徴とするものでダイオードが励起の間並列
トランジスタ′のON。As described above, in the conventional sine wave PWM controlled transistor inverter, a dead time was required for every half cycle of the carrier triangular wave, which caused various negative effects. During this time, do not apply the base input to that transistor,
Turn on and off one of the upper and lower transistors
When the phase of the sine wave current command is reversed to switch the upper and lower transistors, the dead time of one half of the carrier triangular wave '1 is the same as the dead time of the half-open can of carrier triangular wave '1. The transistor is completely turned off! The feature is that a time lag is provided to avoid the voltage Sfl condition in which the other transistor is turned on after the diode is excited, and the parallel transistor is turned on while the diode is excited.
OFFは何ら機能に関係な(為ことに着目し、この間の
ベース入)〕の生成を停止しlここと、であり、この種
正弦波PWM制御トランジスタインl<−タにあって、
懸案となって(Xたデッドタイムに起因り′る種々の不
具合、例えばイン/1−タ出力電圧、電流が同一極性の
間で出力電圧より一定(市電j王を引き去り、逆に反対
極性の間で足し込む作用をなし極性モードにより反対の
働きをなし非対称に影響を及ぼすとか、同様の理由で力
率が1近くであれば出方電圧は常に指令値より低く現わ
れ最大出力電圧の低下をIL(り等、の問題を解消Jる
ことができるという優れた特長を有づる。OFF stops the generation of anything related to any function (focusing on this, the base input during this period), and in this type of sine wave PWM control transistor input,
Various problems caused by dead time (X For similar reasons, if the power factor is close to 1, the output voltage will always appear lower than the command value, causing a decrease in the maximum output voltage. It has the excellent feature of being able to solve problems such as IL.
図面は、第1図が従来の正弦波P W M @till
トランジスタインバータの一相分ブロック図、第2図
がその動作説明のlこめのタイムチャート、第3図が本
発明実施例のブロック図、第4図が同じく動作説明のタ
イムチャート、である。
(1)・・・電流調節器
(2)、・、比較器
(3)・・・上トランジスタ
(4)・・・下トランジスタ
(7)・・・発振器
(17)・・・トランジスタ選択回路
(18)・・・ANDゲート
(19)・・・ANDゲート
出願人 神鋼電機株式会社
代理人 弁理士 斎 藤 春 弥In the drawings, Fig. 1 shows the conventional sine wave P W M @till
2 is a block diagram for one phase of the transistor inverter, FIG. 2 is a time chart illustrating its operation, FIG. 3 is a block diagram of an embodiment of the present invention, and FIG. 4 is a time chart illustrating the same operation. (1) Current regulator (2) Comparator (3) Upper transistor (4) Lower transistor (7) Oscillator (17) Transistor selection circuit ( 18)...AND gate (19)...AND gate applicant Shinko Electric Co., Ltd. agent Patent attorney Haruya Saifuji
Claims (1)
痩・1−ルク制御を行う正弦波PWM制御のトランジス
タインバータにおいて、電流指令の正負極性に応じて矩
形波を生成しかつその矩形波立上りにタイムラグを持た
せたトランジスタ選択回路と、電流調節器の電圧指令と
発振器のキャリヤ三角波を比較し上下トランジスタON
、OFF制御用のパルス波形を出力する比較器と、比較
器のパルス波形及びその反転波形を上記トランジスタ選
択回路の矩形波とANDをとるANDゲート、を備え、
電動機電流の正負極性に対応して上下トランジスタの一
方をON、0FFII制御し他方トランジスタをOFF
のままとしたことを特徴とする1. In a sine wave PWM controlled transistor inverter that has a current #A double loop and adjusts the sine wave current to perform fast lean/1-lux control, it generates a rectangular wave according to the positive and negative polarities of the current command, and A transistor selection circuit with a time lag at the rise of the rectangular wave compares the voltage command of the current regulator and the carrier triangular wave of the oscillator, and turns on the upper and lower transistors.
, a comparator that outputs a pulse waveform for OFF control, and an AND gate that ANDs the pulse waveform of the comparator and its inverted waveform with the rectangular wave of the transistor selection circuit,
Depending on the positive or negative polarity of the motor current, one of the upper and lower transistors is turned ON, 0FFII is controlled, and the other transistor is turned OFF.
characterized by being left as is
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59010597A JPS60156280A (en) | 1984-01-23 | 1984-01-23 | Sinusoidal pwm control transistor inverter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59010597A JPS60156280A (en) | 1984-01-23 | 1984-01-23 | Sinusoidal pwm control transistor inverter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60156280A true JPS60156280A (en) | 1985-08-16 |
JPH0446073B2 JPH0446073B2 (en) | 1992-07-28 |
Family
ID=11754648
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59010597A Granted JPS60156280A (en) | 1984-01-23 | 1984-01-23 | Sinusoidal pwm control transistor inverter |
Country Status (1)
Country | Link |
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JP (1) | JPS60156280A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62290361A (en) * | 1986-06-06 | 1987-12-17 | Fuji Electric Co Ltd | Control system for pulse-width modulation control inverter |
JP2003504001A (en) * | 1999-06-29 | 2003-01-28 | ミラン・プロキン | Boost bridge amplifier |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3610875B2 (en) * | 2000-04-19 | 2005-01-19 | 株式会社デンソー | Electric load drive |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57180377A (en) * | 1981-04-28 | 1982-11-06 | Toshiba Corp | Controller for inverter |
-
1984
- 1984-01-23 JP JP59010597A patent/JPS60156280A/en active Granted
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57180377A (en) * | 1981-04-28 | 1982-11-06 | Toshiba Corp | Controller for inverter |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62290361A (en) * | 1986-06-06 | 1987-12-17 | Fuji Electric Co Ltd | Control system for pulse-width modulation control inverter |
JP2003504001A (en) * | 1999-06-29 | 2003-01-28 | ミラン・プロキン | Boost bridge amplifier |
Also Published As
Publication number | Publication date |
---|---|
JPH0446073B2 (en) | 1992-07-28 |
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