JPS5995498U - Storage device - Google Patents
Storage deviceInfo
- Publication number
- JPS5995498U JPS5995498U JP19264782U JP19264782U JPS5995498U JP S5995498 U JPS5995498 U JP S5995498U JP 19264782 U JP19264782 U JP 19264782U JP 19264782 U JP19264782 U JP 19264782U JP S5995498 U JPS5995498 U JP S5995498U
- Authority
- JP
- Japan
- Prior art keywords
- data
- storage device
- line
- lines
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の記憶装置を示す回路図、第２図は本考案
の第１の実施例の記憶装置を示す回路図、第３図は本考
案め第２の実施例の記憶装置を示す回路図である、。
゛ 両図において、１・・・・・・Ｘデコーダ、２
・・・・・・Ｙデコーダ、３・・・・・・ワ・−ド線、
４・・・・・・データ線、５・・・・・・メモリセル、
６・・・・・・書き込み制御回路、１０・・・・・・Ｙ
アドレス端子、１１・・・・・・Ｘアドレス端子、１２
・・・・・・データ端子、１３・・・・・・書き込み信
号端子、１０１乃至１０８・・・・・・メモリセル、１
０９乃至１１６・・・・・・データバッファ、１１７乃
至１２４・・・・・・データ線、１２５・・・・・・ワ
ード線、１２６・・・・・・Ｘデコーダ、１２７・・・
・・・Ｘアドレス端子、１２８・・・・・・Ｙデコーダ
、１２９・・・・・・Ｙアドレス端子、１３０・・・・
・・データ端子、１３１・・・・・・書き込み制御回路
、１３２・・・・・・書き込み信号端子、２０１乃至２
０８・・・・・・メモリセル、２０９乃至２１６・・・
・・・データバッファ、２１７乃至２２４・・・・・・
ワード線、２２５・・・・・・データ線、２２６・・・
・・・Ｘデコーダ、２２７・・・・・・Ｘアドレス端子
、２２８・・・・・・Ｙデコーダ、２２９・・・・・・
Ｙアドレス端子、１３０・・・・・・データ端子、２３
．１・・・・・・書き込み制御回路、？３２・・・・・
・書き込み信号端子。FIG. 1 is a circuit diagram showing a conventional storage device, FIG. 2 is a circuit diagram showing a storage device according to a first embodiment of the present invention, and FIG. 3 is a circuit diagram showing a storage device according to a second embodiment of the present invention. This is a circuit diagram.゛ In both figures, 1...X decoder, 2
...Y decoder, 3...word line,
4...data line, 5...memory cell,
6...Writing control circuit, 10...Y
Address terminal, 11...X address terminal, 12
...Data terminal, 13...Write signal terminal, 101 to 108...Memory cell, 1
09 to 116...Data buffer, 117 to 124...Data line, 125...Word line, 126...X decoder, 127...
...X address terminal, 128...Y decoder, 129...Y address terminal, 130...
...Data terminal, 131...Write control circuit, 132...Write signal terminal, 201 to 2
08...Memory cells, 209 to 216...
...Data buffer, 217 to 224...
Word line, 225...Data line, 226...
...X decoder, 227...X address terminal, 228...Y decoder, 229...
Y address terminal, 130...Data terminal, 23
．． 1...Writing control circuit? 32...
・Write signal terminal.
Claims (1)
、複数のデータ線または複数のワード線上の記憶セルに
同時に書き込みを行なえるように、データ線またはワー
ド線の書き込み系回路にデータバッファを設けたことを
特徴とする記憶装置。In an electrically writable read-only memory device, a data buffer is provided in the write system circuit of the data line or word line so that data can be written to memory cells on multiple data lines or multiple word lines at the same time. Characteristic storage device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19264782U JPS5995498U (en) | 1982-12-20 | 1982-12-20 | Storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19264782U JPS5995498U (en) | 1982-12-20 | 1982-12-20 | Storage device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5995498U true JPS5995498U (en) | 1984-06-28 |
Family
ID=30414538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19264782U Pending JPS5995498U (en) | 1982-12-20 | 1982-12-20 | Storage device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5995498U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55129996A (en) * | 1979-03-23 | 1980-10-08 | Fujitsu Ltd | Write system of read-only memory |
| JPS5687150A (en) * | 1979-12-19 | 1981-07-15 | Fujitsu Ltd | Writer for read only memory |
| JPS56134390A (en) * | 1980-03-21 | 1981-10-21 | Fujitsu Ltd | Rom element |
-
1982
- 1982-12-20 JP JP19264782U patent/JPS5995498U/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55129996A (en) * | 1979-03-23 | 1980-10-08 | Fujitsu Ltd | Write system of read-only memory |
| JPS5687150A (en) * | 1979-12-19 | 1981-07-15 | Fujitsu Ltd | Writer for read only memory |
| JPS56134390A (en) * | 1980-03-21 | 1981-10-21 | Fujitsu Ltd | Rom element |
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