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JPS5952659U - hybrid integrated circuit - Google Patents

hybrid integrated circuit

Info

Publication number
JPS5952659U
JPS5952659U JP14721982U JP14721982U JPS5952659U JP S5952659 U JPS5952659 U JP S5952659U JP 14721982 U JP14721982 U JP 14721982U JP 14721982 U JP14721982 U JP 14721982U JP S5952659 U JPS5952659 U JP S5952659U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
wiring pattern
conductive member
substrate material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14721982U
Other languages
Japanese (ja)
Inventor
能勢 忠司
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP14721982U priority Critical patent/JPS5952659U/en
Publication of JPS5952659U publication Critical patent/JPS5952659U/en
Pending legal-status Critical Current

Links

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は本考案に係るハイブリッドICの斜
視図である。 1・2・・・基板材、3・・・接着剤、4・・・電気的
接続領域、5・・・配線パターン、6・・・導電性部材
、7・・・リード線。
1 and 2 are perspective views of a hybrid IC according to the present invention. DESCRIPTION OF SYMBOLS 1 and 2... Substrate material, 3... Adhesive, 4... Electrical connection area, 5... Wiring pattern, 6... Conductive member, 7... Lead wire.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)それぞれ上面に所定の電気的配線パターンを備え
た第1の基板材と第2の基板材の背面を互いに貼着する
ことによって形成された基板を介して互いに対向するよ
うに前記基板の両面の端部に設けられた複数の電気的接
続領域を有し、前記対向する電気的接続領域は、それぞ
れ同一面上の所要の配線パターンに接続しているもので
あり、かつ前記基板に外嵌する導電性部材によって電気
的に接続されているものであることを特徴とする混成集
積回路。
(1) A first substrate material and a second substrate material, each having a predetermined electrical wiring pattern on its upper surface, are formed by adhering their back surfaces to each other. It has a plurality of electrical connection areas provided at the ends of both sides, and each of the opposing electrical connection areas is connected to a required wiring pattern on the same surface, and is external to the board. A hybrid integrated circuit characterized in that the circuit is electrically connected by a fitted conductive member.
(2)前記導電性部材はリード線を兼用するものである
ことを特徴とする実用新案登録請求の範囲第1項記載の
混成集積回路。
(2) The hybrid integrated circuit according to claim 1, wherein the conductive member also serves as a lead wire.
JP14721982U 1982-09-30 1982-09-30 hybrid integrated circuit Pending JPS5952659U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14721982U JPS5952659U (en) 1982-09-30 1982-09-30 hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14721982U JPS5952659U (en) 1982-09-30 1982-09-30 hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS5952659U true JPS5952659U (en) 1984-04-06

Family

ID=30327451

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14721982U Pending JPS5952659U (en) 1982-09-30 1982-09-30 hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5952659U (en)

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