JPS5873238A - Mos logical circuit - Google Patents

Abstract

PURPOSE:To decrease the number of transistors (TRs) and to increase the degree of circuit integration, by using a part of P MOS TRs in common, in obtaining or more logical outputs out of several kinds of inputs. CONSTITUTION:In obtaining logical outputs of X=-(A.B) and Y=-(A.B+C. D.E) through the combination of complementary MOS TRs, a connecting point bwtween the source of a P type MOS TR and a drain of another P MOS TR is taken as an output point X. This output point is added with an output point Y of the P MOS TR circuit. An N type MOS TR circuit complementary with logic Y=- (A.B+C.D.E) is connected bwtween the output point Y and a reference poten tial. Thus, since the P type MOS TRs can be used in common for both logical circuits, the number of TRs can be saved for the number of common uses.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a miniaturized nine logic circuit by combining complementary MO8 transistors. Conventionally, when obtaining two or more logic outputs from several types of inputs, for each input signal, A complementary M08 transistor circuit with a symmetrical configuration had to be charged for the number of electric field outputs, and several identical transistor configurations had to be made.

The above will be explained using the drawings.

As shown in FIG. 1, the conventional logic circuit has j%1 (a
X of 1:A-H circuit and Y=A- of FIG. 1(b)
B-) Consists of C-D-E circuits. In order to obtain these two outputs, conventional lines are generally constructed by two mutually independent and symmetrical complementary M08 transistor circuits.
The logic is shown in the truth table in Table 1. In this case, P-type MOB transistors manually operated using A and B as gates must be made in common, and the number of transistors required to obtain the same logic output is The drawback is that a large number of them are required.

An object of the present invention is to eliminate such drawbacks and provide a miniaturized logic circuit by combining integrated circuits.

According to the present invention, a P-type MOS transistor circuit and an N
Complementary type MO8) Complementary type MO8) consisting of transistor circuits configured in a mutually complementary logical relationship In MO8 logic circuits including transistor circuits, P-type MOBs are connected vertically to each other
The MOB logic circuit is obtained by adding the P-type M (n-type MOB complementary to the logic of the JS transistor circuit) transistor circuit to each of the nodes where the source and drain of the transistor are connected. It will be done.

Thus, according to the present invention, the complementary type MO8) of the predetermined principle
Since a transistor circuit can take as many different logic outputs as its nodes (output points), the number of transistors required to configure the conventional symmetric complementary MOB transistor logic is
Since the θS transistors can be used in common, the number of transistors can be reduced by that number, and as a result, the degree of integration for the same function can be improved.

Next, the present invention will be described in detail with reference to the drawings.

FIG. 2 is a circuit connection diagram showing one embodiment of the present invention. As shown in this figure, according to one asymmetrical complementary circuit according to the present invention, the number of transistors is 12.
The number of transistors in the conventional configuration shown in FIG. 1 (Jl) and (b) is 14.

The number of MOS transistors required to obtain the same logical output can be reduced by two.

Next, it will be explained that the logic circuit in FIG. 2 has the same output as the two logic circuits shown in FIGS. 1(a) and 1(b). This circuit is a symmetrical complementary logic circuit that obtains one logic output X = A - B Yt. Furthermore, the output point Y'(z
Constructed by adding.

The logic obtained by attaching a load resistor 710 between this output point Y and the reference potential is Y = A-B + C-D -E, and an n-type NO81 transistor circuit complementary to this logic is connected to the output point. This is added between Y and the reference potential.

The fact that such logical outputs X and Y in the present invention are obtained independently and without interference will be fully explained. In FIG. 2, the sources and drains of transistors QPC, Qpo, and Qpi+ are connected, respectively.
Each source and each drain of pz are connected to each other. Also, if the transistor QfI@haYi source is set as Ztt
The transistors Q, . transistor Q,
The system has a Yi source, 4 is the drain, and the transistor Q
, is have Z3 as the source and the reference potential as the drain, transistor Q*A' has X as the source and 4-tube drain, and transistor Q-1f has 4 as the source and the reference potential as the drain.

FIG. 3 shows these transistors 9 and QP1 as HA.

Transistors Qpc, Qpo, Qi+IAt-HBm
) Transistors Qnc, Qmp, Qmm as He, ) Transistors Q, Mu, Qam as HD, transistor Qml
, is an equivalent circuit diagram in which HD' is replaced with HD'. When these 8 transistors are conductive, the transistor HD, HD
' is non-conducting, when transistor HA is non-conducting, transistor HD, HD' is conducting, when transistor HB is conducting, transistor HC is non-conducting, transistors H and B
When is non-conductive, transistor HC becomes conductive, and transistor HA becomes conductive.

HD, HD' and transistors HH, HC are independent from each other. Regarding the output XK, if the transistor HB is conductive, the transistor HC is non-conductive, and since the transistors HD and HD share the same source and drain, A-B becomes, and if the transistor HB is non-conductive, then the transistor HC is non-conductive. Regardless of rOJJIJ of transistors He and HD, the output is A-B. 9.1-1 The power X is HB, He
It does not depend on the output Y. Well, a tiger.
When transistor HA is conductive, transistor HI)'[is non-conductive and does not depend on transistor HD';
When is non-conductive, transistor HD becomes conductive and Y becomes the reference potential. 0 As a result, Y becomes independent with respect to transistor HD', and the logic circuit (a), (t
)) and the electric field circuit in Figure 2 can be said to be equivalent.

As described above, the MO8 logic circuit of the present invention is a complementary MOB transistor circuit having a predetermined logic output, and PW! M
O8) At the node of the output point where the source and drain of the transistor are connected, add another N-type MO8) run transistor buried circuit that is complementary to the logic of the output t-P type M08 transistor containing its logic output. The number of other logic outputs that can be derived from one logic output corresponds to the number of sources and drains of the P-type MOS transistor logic circuit.

[Brief explanation of the drawing]

1(al) and (b) are circuit diagrams of a conventional MO8 logic circuit, FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIG. 3 is an equivalent circuit diagram explaining FIG. 2. In the figure, QP, QPB, QPC1QPD, QPtomi...P type M
08 transistor, QIIA, Q+am, QnC
,QmD,Qm! , QmA', Qml'+"1@'M
n-type MO8) transistor, X, Y... Output point (
Node), Zs - Zt - Zs, Z4 "" contact. It is. First evil

Claims (1)

[Scope of Claims] An MO8 logic circuit including nine complementary @'hlJ8 transistor circuits, in which a PIINO8) transistor circuit and an N11MO8 transistor circuit are arranged in a mutually complementary logical relationship between predetermined power supplies on the same semiconductor substrate. p[MO8) connected in cascade with each other? h-type MO complementary to multiple nodes connected to the source and drain of the transistor
8) MO8 logic circuit 0 characterized in that it is configured by adding transistor circuits to each