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JPS5381061A - Logical circuit - Google Patents

Logical circuit

Info

Publication number
JPS5381061A
JPS5381061A JP15867276A JP15867276A JPS5381061A JP S5381061 A JPS5381061 A JP S5381061A JP 15867276 A JP15867276 A JP 15867276A JP 15867276 A JP15867276 A JP 15867276A JP S5381061 A JPS5381061 A JP S5381061A
Authority
JP
Japan
Prior art keywords
logical circuit
circuit
constituting
plural number
nand
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15867276A
Other languages
Japanese (ja)
Inventor
Shiro Araya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15867276A priority Critical patent/JPS5381061A/en
Publication of JPS5381061A publication Critical patent/JPS5381061A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)

Abstract

PURPOSE:To obtain a plural number of logical outputs from one circuit by constituting a NAND circuit and NOR circuit with the use of a fundamental inverter circuit.
JP15867276A 1976-12-27 1976-12-27 Logical circuit Pending JPS5381061A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15867276A JPS5381061A (en) 1976-12-27 1976-12-27 Logical circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15867276A JPS5381061A (en) 1976-12-27 1976-12-27 Logical circuit

Publications (1)

Publication Number Publication Date
JPS5381061A true JPS5381061A (en) 1978-07-18

Family

ID=15676832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15867276A Pending JPS5381061A (en) 1976-12-27 1976-12-27 Logical circuit

Country Status (1)

Country Link
JP (1) JPS5381061A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5851624A (en) * 1981-09-24 1983-03-26 Nec Corp Logical circuit
JPS5873238A (en) * 1981-10-28 1983-05-02 Nec Corp Mos logical circuit
JPS61208922A (en) * 1985-03-13 1986-09-17 Tatsuoki Watanabe Multi-value logical output circuit constitution for multi-value logical circuit by cmos
JPH04281294A (en) * 1991-03-11 1992-10-06 Matsushita Electric Ind Co Ltd Driving circuit
JP2010141903A (en) * 2005-10-18 2010-06-24 Panasonic Corp Semiconductor integrated circuit
JP2013506349A (en) * 2009-09-28 2013-02-21 アルテラ コーポレイション Apparatus and related method for metastability enhanced storage circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5851624A (en) * 1981-09-24 1983-03-26 Nec Corp Logical circuit
JPH0217971B2 (en) * 1981-09-24 1990-04-24 Nippon Electric Co
JPS5873238A (en) * 1981-10-28 1983-05-02 Nec Corp Mos logical circuit
JPH0136736B2 (en) * 1981-10-28 1989-08-02 Nippon Electric Co
JPS61208922A (en) * 1985-03-13 1986-09-17 Tatsuoki Watanabe Multi-value logical output circuit constitution for multi-value logical circuit by cmos
JPH04281294A (en) * 1991-03-11 1992-10-06 Matsushita Electric Ind Co Ltd Driving circuit
JP2010141903A (en) * 2005-10-18 2010-06-24 Panasonic Corp Semiconductor integrated circuit
JP2013506349A (en) * 2009-09-28 2013-02-21 アルテラ コーポレイション Apparatus and related method for metastability enhanced storage circuit

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