JPS5851732A - Overcurrent protecting device for inverter - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an overcurrent protection device for an inverter that uses a G?0 starter as a main switch element.

In the GTO inverter, when a commutation failure occurs, an excessive fault current flows, and if this current exceeds the inverter's available control current, the GTO thyristor has no self-extinguishing ability7.
Conventionally, I
As shown in the figure, a fuse IF is provided on the DC input side of the impermeable NV, and a circuit is adopted to cut off the current by blowing the fuse.
is a DC reactor and Call1 smoothing capacitor.

In the conventional circuit of e, there is a limit to the responsiveness of 1.7 aze y, and a steep discharge current flows in the capacitor section during the time from commutation failure to 7 aze y melting. There is a risk of damaging the switch element. Therefore, it is difficult to design the switching elements themselves to have sufficient current margin, resulting in an expensive inverter configuration.

In addition, in the conventional circuit, Ky&-Z EF is interrupted when commutation fails, and maintenance is complicated in that it is necessary to replace the fuse 0 each time.

The present invention provides a switch in series on a smoothing capacitor,
By turning off the switch when a commutation failure is detected and controlling the inverter to stop before the voltage from the forward converter increases, the short-circuit current at the time of a commutation failure can be kept low. The purpose of this invention is to provide a running overcurrent protection device that enables proper experience of circuit elements.

FIG. 2 shows an open circuit (2) showing an embodiment of the present invention.

In the figure, a switch S1 consisting of a diode D1 and a thyristor TH connected in the discharging direction of the capacitor CD is provided to connect the DC reactor, and an auxiliary thyristor TH is provided for forced commutation of the second thyristor TH.
, and a commutation capacitor CIs and a commutation reactor Ll are provided in parallel with the thyristors TH and K, a resistor R1 is provided for charging the commutation capacitor CI, and an inverter NY
A commutation failure detection circuit CFD is provided which cuts off the on-gate signal of the thyristor 'rH1 and fires the auxiliary thyristor TH when commutation failure of the thyristor 'rH1 is detected, and further gives a command to stop the operation of the gate control circuit GCK of the imperter MY.

Commutation failure detection in this commutation failure detection circuit OFD IC is performed by installing a current limiting resistor R- and a photo resistor between the DC high voltage side and the low voltage side of the inverter main circuit, which uses a GTO thyristor as a bridge arm element, as shown in Figure 3. A light emitting element of a coupler PC is connected in series, and a voltage drop due to a commutation failure in the inverter main circuit is detected as a change in the output current of the light receiving element of the 7-auto coupler PC.

In addition to detecting commutation failure using this method, for smoothing; detecting the discharge current of the capacitor with a current transformer □ Detecting the DC side current of 40゛ or impertainer NY directly due to commutation failure Of course, it can be detected as appropriate from the increase and increase in the main circuit current.

Such a commutation failure detection circuit Km - Detection □ Note: The level judgment by a comparator (not shown) is performed using the iris registers TH, T
The ignition signal of H, and the command signal to the gate control circuit GO are emitted.・In this configuration, for energizing operation of the inverter, the DC output of the forward converter CNV is supplied to the inverter NVIIK through the reactor L, and the capacitor Cd is charged through the diode D1 and the capacitor c is charged by constantly firing the thyristor 'rH1.
The discharge from d smoothes the DC voltage vd.

At this time, the commutating capacitor CI is charged to the indicated polarity through a resistance type with a time constant of 9 times to a DC voltage vd.

If there is a commutation failure due to some reason during the inverter operation, the commutation failure detection circuit CFD cuts off the firing signal of the thyristor TH1 and fires the auxiliary thyristor TH. As a result, □, with respect to the current in capacitor Cd that starts to rise sharply after commutation failure occurs, the oscillating current due to commutation capacitor Ozh and commutation accelerator L flows through diode D and causes thyristor TH to move in the opposite direction. The thyristor TH1 is turned off to stop the capacitor CdO discharge current.

With this control, the fault current due to commutation failure rapidly decreases, and the subsequent current flows from the forward converter CN to the O reactor LK.
As a result, the fault current O, which has a slow rise, increases to 1.

The commutation failure detection circuit CFD gives a rolling stop command to the gate control circuit GCK at the same time as the Nyristor ignition control, and cools down the turn-off control of each G'l'O thyristor of the impertae NV. Gate control - When the minimum on-time is ensured for each GTO thyristor in response to the operation stop command, GO immediately controls off, but when the minimum on-time is not ensured for the GTO thyristor, the wrinkle time, Just attend and control off.

FIG. 4 shows the fault current when commutation fails, at time t.

If the commutation fails at
゜ increases slowly while being suppressed by the accelerator LK, but when the discharge current layer of the capacitor CD (1, is cut off by the thyristor THIK), the suppressing reactance of the capacitor CD (K) increases sharply as shown by the broken line, since only the wiring impedance is present. The rising edge becomes K. With respect to this current change, the time t
At time 1.s, the current layer d flowing toward the inverter INV is suppressed as shown by the solid line by the turn-off control of the thyristor TH1 based on the detection of commutation failure. Forward converter CN
Only the current layer from V is K. If this time t3 is equal to or longer than the minimum on-time required for the GTO thyristor of the impermeer (2), the fault current becomes zero at that time by off-control of the GTO thyristor.

In this way, there is a risk that the conventional protection circuit may damage the GTO Nyristor due to the excessive current layer d3 from the capacitor Cd. It is necessary to turn off the thyristor after the minimum on-time required by the thyristor, and the excessive current of the capacitor cannot be suppressed, which may exceed the controllable current of the thyristor and result in 9-off control, resulting in damage to the thyristor. be. On the other hand, in the main generator-KTh, by detecting a commutation failure, the current path of the capacitor is cut off, the discharge current to the inverter side is interrupted, and then the KTh
By ensuring the minimum on-time required for the GTO thyristor and controlling its off, it is possible to turn off the thyristor within a controllable current.

Therefore, according to this publication '511, even when a commutation failure occurs, the current flowing through the GTO thyristor of the inverter can be suppressed to a low level and the operation can be stopped. This has the effect of making it possible to protect it by designing it to be low. In other words, it is possible to improve the reliability of the inverter, and it is possible to eliminate the need for protective fuses, thereby saving the effort of replacing them.

[Brief explanation of the drawing]

Fig. 1 is a main circuit configuration diagram for explaining a conventional inverter overcurrent protection device, Fig. 2 is a main circuit configuration diagram showing an embodiment of the present invention, and Fig. 3 corresponds to Fig. 2. FIG. 4 is a diagram for explaining the commutation failure detection circuit and a current waveform diagram for explaining the protective operation in the present invention. CNV...Forward converter, Engineering NV...Inverter, L.
... DC reactor, Cd ... e smoothing bundenna, OFD ... commutation failure detection circuit, Go-fist/gate control circuit, C1 ... commutation capacitor, IJI ... commutation reactor. Figure 1 Figure 2 [

Claims (1)

[Claims] In order to use the gate turn-off switch I as the main switch element, the inverter K is equipped with a DC voltage in the inverter main circuit. The S switch is connected in series to cause a discharge current of 0, and the inverter's commutation failure is controlled horizontally to turn off the switch, and the upper I! The isipata O overcurrent protection device is equipped with a ham failure detection circuit that controls the operation and shutdown of the isipata main road.