JPS5851382B2 - fluorescent display tube - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a fluorescent display tube, and more particularly to a fluorescent display tube for displaying information such as letters, numbers and symbols.

As this type of fluorescent display tube, a structure as shown in FIG. 1 has recently been proposed by the applicant.

That is, in FIG. 1(a), the surface of the glass substrate 1 is coated with, for example, vapor deposition or CVD (Chemical Vapor).
A silicon nitride (5i3N4) film 2 is formed on the entire surface by a pour deposition method.

On the surface of this nitride film 2, wiring layers 3 and 4 are arranged, which are formed by appropriately photoetching an aluminum (,',g) layer formed by, for example, vapor deposition.

Cadmium selenide (CdSe) is applied to the separated portions of wiring layers 3 and 4 by vapor deposition or sputtering.
After forming the layers, a semiconductor layer 5 is deposited, which is formed by photoetching leaving only desired areas.

Both ends of this semiconductor layer 5 are connected to wiring layers 3 and 4, respectively.

On the surface of the glass substrate 1 whose surface has been processed in this way, an insulating layer 6 is disposed, which is also formed by appropriately photoetching a silicon nitride film formed by vapor deposition, CVD, or the like.

This insulating layer 6 is not disposed on the wiring layer 4, and is coated with zinc oxide (ZnO:ZnO) by, for example, printing technology.
), etc., is arranged.

Further, a gate electrode 8 made of aluminum (, U) is formed on the insulating layer 6 at a portion where the wiring layers 3 and 4 are separated in a direction perpendicular to the drawing.

In this way, TPT (ThinF) is formed on the glass substrate 1.
ilm Transistor) 9 and phosphor section 10
are formed, and wiring layers 3 and 4 serve as a source electrode and a drain electrode connected to phosphor layer 7, respectively.

Further, on the surface part, a passivation film 11 made of a silicon nitride layer is formed, leaving a region where the phosphor layer 7 is formed.
is formed.

The single phosphor thus formed is arranged in a multi-IJ layout on the glass substrate 1, and its circuit configuration is as shown in FIG. 1(b).

That is, the TPTs arranged in the vertical direction share the gate electrode 8, G, , G, 2, . ... are pulled out to the outside of the glass substrate 1, and each of the TPTs arranged in the horizontal direction has a common source electrode 3 and is connected to Sl, S.
2. ... are drawn out to the outside of the glass substrate 1.

The drain electrode 4 of each TPT is connected to the phosphor layer 7.

Glass substrate 1 on which a plurality of fluorescent elements are formed in this way
Thin wires, which serve as cathode electrodes, are placed on the top surface, and the glass container is sealed by covering these wires.

In such a configuration, when a voltage is applied to desired portions of the Gn and Sn, the desired phosphor emits light to display a diagram.

For example, if Sl is kept at a positive potential with respect to the cathode and a signal pulse is applied to G1 to turn on the gate, the potential of Sl will be applied to the drain electrode, so that electrons from the cathode will emit the fluorescent light. When the body is irradiated, Pl 1 emits light.

However, in the fluorescent display tube having the above structure, the formation of the phosphor layer 7 coated on the wiring layer 4 is performed by electrodeposition, printing,
There are various precipitation methods, but usually, as shown in Figure 2, an electrode 13 is placed on the positive side and a glass substrate 1 to be coated with the phosphor is placed on the negative side in an electrolytic solution 12 in which a phosphor is dispersed. Then, a phosphor layer 7 is applied on the drain electrode 4 by electrodeposition.

In this case, as shown in FIG. 1, a passivation film 11 is formed on the wiring layers 3 and 4, but since the thickness of this passivation film 11 is about 1 μm, A phosphor layer 7 is formed by adhering the phosphor.

The passivation film 11 may be formed thickly, but if the film 11 is formed too thick, the film 11 may peel off or cracks may occur, which is not practical.

Furthermore, if a thin film is formed by a vapor deposition method, a voltage of about 100 V is applied during electrodeposition of the phosphor, so a TPT with a high withstand voltage is required, making the manufacturing conditions strict.

In addition, when applying the phosphor onto the drain electrode 4 by a printing method as another phosphor coating method, baking is performed at 500 to 600°C to remove the binder after printing the phosphor. The characteristics of TPT change depending on the temperature.

Further, recrystallization of the At conductor layer occurs, which causes a decrease in the withstand voltage of the insulating layer 6.

Furthermore, in the case of the precipitation method, if the four drain electrode surfaces to which the phosphor is coated have a structure in which small dots are aligned, it is extremely difficult to chamfer the phosphor after the phosphor is precipitated.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a fluorescent display tube that is low cost, easy to manufacture, and has improved reliability of TPT transistors.

In order to achieve this object, the present invention provides a grid spacer between the substrate and the filament, and provides an XY matrix TPT on the grid spacer.

The present invention will be described in detail below using the drawings.

FIG. 3 is a sectional view of a main part showing an example of a fluorescent display tube according to the present invention, and since the same symbols as in FIG. 1 represent the same elements, a description thereof will be omitted.

In the figure, 14 is a windshield made of a translucent glass plate, 15 is a filament that emits electrons, 16 is a grid mesh electrode for uniformly distributing the electrons emitted from this filament 15, and 17 is a through-hole. An insulating grid spacer in which a plurality of dot holes 17a are arranged in a matrix and a TPTl 8 (described later) is formed on the upper surface; 19 is a substrate made of a translucent glass plate; 20 is a position of the holes 17a of the grid spacer 17; The phosphors are coated and arranged in a matrix on the substrate 19 in correspondence with the phosphors.

Although the electrodes and the like of this phosphor 20 are omitted in the drawing, it goes without saying that an anode voltage is applied thereto and constitutes a display section.

Further, the grid spacer 17 is formed in a structure as shown in a perspective view of the main part in FIG. 4.

That is, in the figure, a silicon nitride film is applied to the entire surface of the transparent grid spacer glass 21 by vapor deposition or CVD, and an aluminum layer formed by, for example, vapor deposition is applied to the upper surface of this silicon nitride film. A source electrode 3 consisting of a wiring layer formed by photo-etching into a predetermined shape. A source terminal lead 3a and a drain electrode 4 are formed therein.

Then, a cadmium selenide layer is formed at the separated portions of the source electrode 3 and drain electrode 4 by a vapor deposition method or a sputtering method, and then a semiconductor layer (not shown) is formed by photoetching, leaving only desired portions. , both ends of this semiconductor layer are connected to a source electrode 3 and a drain electrode 4.

Further, on the surface of the grid spacer glass 21 whose surface has been processed in this way, an insulating layer (not shown) is arranged, which is formed by appropriately photoetching a silicon nitride film formed by vapor deposition or CVD method. A gate electrode 8 made of an aluminum layer and its gate terminal lead 8a are formed on the layer where the source electrode 3 and drain electrode 4 are separated, and a passivation film (not shown) is formed on the upper surface thereof.

In this way, the T
FTl8 is formed, and the other end sides of each source electrode 3 and gate electrode 8 are extended to the end of the grid spacer glass 21 as a source terminal lead 3a and a gate terminal lead 8a, respectively, which are made of the same material and formed at the same time as wiring layers. is present.

The other end of the drain electrode 4 is connected to a dot hole electrode 22 formed by depositing or sputtering a conductor in a dot hole 1a provided through the grid spacer glass 21.

In the fluorescent display tube constructed in this way, the filament 15 is heated by an AC filament power supply, and the filament 15 is connected to the grid mesh electrode 16 and the phosphor 20.
A pulse voltage is applied to the source terminal lead 3a, which sets a positive potential lower than that of the phosphor 20 to a high level, and a cut-off potential to be described later to a low level, and a gate terminal. Signal voltages for switching the TFTs 8 are applied to the leads 8a to drive them.

First, thermionic electrons emitted from the filament 15 are accelerated and diffused by the grid mesh electrode 16 and reach the grid spacer 21 .

Next, when a signal is applied to the gate electrode 8 and the TPTI 8 is switched, the dot hole electrode 22 connected to the drain electrode corresponding to the source electrode 3 to which a pulse of positive potential is applied has a positive potential pulse applied to the source electrode 3. A pulse of positive potential is applied.

Therefore, some of the electrons that have reached the grid spacer 21 flow as a drain current into the dot hole electrode 22 to which a pulse of positive potential has been applied, while the other part of the electrons that have reached the grid spacer 21 flow as a drain current to the dot hole electrode 22 to which the phosphor 20 has a positive potential (as described above). (anode voltage), it is further accelerated, passes through the dot hole 21a, flows into the phosphor 20, and performs a light-emitting display.

On the other hand, the dot hole electrode 22 to which the positive potential pulse applied to the source electrode 3 is not applied due to the combination of the gate electrode 8 and the source electrode 3 is maintained at a so-called cut-off voltage potential that prevents electrons from passing through the dot hole 21a. Therefore, the phosphor 20 corresponding to the dot hole 21a does not emit light.

In this way, the light emission display of each phosphor 20 is controlled.

Further, as shown in FIG. 5, by combining TPTl B with a memory circuit consisting of a memory TFT 23 and a capacitor 24, it can have a memory function.

According to such a configuration, since the forming part of TPTl 8 and the forming part of phosphor 20 are separated, electrodeposition and printing methods can be adopted as the phosphor coating method, so that the wiring layer A fluorescent display tube can be easily manufactured without attaching a fluorescent material 20 on top or performing difficult chamfering work.

Furthermore, since it is possible to combine a good substrate 19 with a good grid spacer 11 on which the TFT 18 is formed, the production yield can be improved.

Furthermore, if the substrate 19 and the grid spacer 1T are combined in the process of sealing the windshield 14 with frit glass, the conventional grid mesh firing process can be omitted, reducing changes in the characteristics of the TFT 18 due to temperature processes. can be done.

As described above, according to the present invention, it is possible to obtain a fluorescent display tube that is easy to manufacture, has low production costs, and has improved reliability of TPT transistors, which is an extremely excellent effect.

[Brief explanation of the drawing]

Figures 1a and b are sectional views and circuit diagrams of essential parts showing an example of a fluorescent display tube, Figure 2 is a configuration diagram of essential parts for explaining an example of a method of electrodeposition of phosphors, and Figure 3 is a diagram showing the configuration of essential parts. FIG. 4 is a sectional view of a main part showing an example of a fluorescent display tube according to the present invention, FIG. 4 is a perspective view of a main part showing an example of a grid spacer according to the present invention, and FIG. This is a circuit diagram of the main part in which two TPTs and one capacitor are combined in order to achieve this. DESCRIPTION OF SYMBOLS 1...Glass substrate, 2...Silicon nitride film, 3...Wiring layer (source electrode), 3a...
... Source terminal lead, 4 ... Wiring layer (drain electrode), 5 ... Semiconductor layer, 6 ...
- Insulating layer, 7... Fluorescent layer, 8... Gate electrode, 8a... Gate terminal lead, 9...
... TPT, 10... Fluorescent part, 11...
... Passivation film, 12 ... Electrolyte, 13 ... Electrode, 14 ... Windshield, 15 ... Filament, 16 ...・
・Grid mesh electrode, 17... Grid spacer, 17a... Hole, 18... TF
T119...substrate, 20...fluorescent material,
21... Grid spacer glass,... Dot hole electrode, 2 Capacitor.

Claims (1)

[Claims] 1. An envelope whose at least one side is transparent; a display portion formed by dot-shaped phosphor coating on the inner wall of the envelope;
It has a plurality of through holes provided opposite to each of the display parts, and each drain electrode is connected to an electrode formed on the inner wall surface of each of the through holes, and each source electrode is connected to each column and each gate. A grid spacer having a plurality of TPTs with electrodes commonly connected to each other in each row, a grid mesh electrode facing the grid spacer and covering the entire display area, and a filament stretched across the grid mesh electrode. A fluorescent display tube comprising: