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JPS58200546A - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS58200546A
JPS58200546A JP57083091A JP8309182A JPS58200546A JP S58200546 A JPS58200546 A JP S58200546A JP 57083091 A JP57083091 A JP 57083091A JP 8309182 A JP8309182 A JP 8309182A JP S58200546 A JPS58200546 A JP S58200546A
Authority
JP
Japan
Prior art keywords
solder
pellet
semiconductor
melting point
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57083091A
Other languages
Japanese (ja)
Inventor
Keiji Miyamoto
宮本　圭二
Toru Kawanobe
川野辺　徹
Tatsuo Itagaki
板垣　達夫
Shinobu Tokuhara
徳原　忍
Seiichi Ichihara
誠一 市原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP57083091A priority Critical patent/JPS58200546A/en
Publication of JPS58200546A publication Critical patent/JPS58200546A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
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    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は安価で確実なペレット付けを行うことのできる
半導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device that allows reliable pellet attachment at low cost.

従来、半導体製品の製造過程において半導体ベレットを
リードフレームのタブ等のベレット取付面上に散り付け
る場合、ベレットのシリコン（Ｓｉ）とベレット取付面
上の金（Ａｕ）との共晶を利用してペレット付けを行っ
てぃる＠ ところが、金の価格の高騰によりペレット付けのコスｔ
が極めて高くなって米ており、この傾向は全資源の枯渇
により将来ますます深刻化して行くものと考えられる。Conventionally, in the process of manufacturing semiconductor products, when scattering semiconductor pellets onto the pellet mounting surface such as a tab of a lead frame, the eutectic of the silicon (Si) of the pellet and the gold (Au) on the pellet mounting surface is used. However, due to the rise in the price of gold, the cost of pelletizing is increasing.
This trend is expected to become even more serious in the future as all resources are depleted.

そこで、金のようκ高価な材料を用いることなくペレッ
ト付けを行なうために様々な提案がなされており、その
１つとして半田を用いる方式がある。半田は金忙比べて
はるかに安価な材料であり、ペレット付は性能から見て
も非常に有望なものである。Therefore, various proposals have been made to attach pellets without using expensive materials such as gold, one of which is a method using solder. Solder is a much cheaper material than solder, and pelletized material is very promising in terms of performance.

しかしなから、半田材料を用いることにも間鵬点がない
わけではない。すなわち、半田は鉛（Ｐｂ）とすず（Ｓ
ｎ）との合金で、その融点が非常に低く、たとえばＰｂ
５０％，Ｓｎ５０％の半田合金の融点は２１３℃である
。However, the use of solder materials is not without its drawbacks. In other words, solder is made of lead (Pb) and tin (S).
n), whose melting point is very low, such as Pb
The melting point of a solder alloy of 50% Sn and 50% Sn is 213°C.

そのため、半田を用いてペレット付けをした場合、その
後のワイヤボンディング時やノくツケージの刺止時にた
とえば３５０℃以上の高温で加勢さＶる際に半田が溶融
し、ペレッ｝Ｋ対して圧着力が加えられるとベレットの
位置がずれてしまう等（７’）問題があった。Therefore, when attaching a pellet using solder, the solder melts when it is applied at a high temperature of, for example, 350°C or higher during subsequent wire bonding or when inserting a nut cage, and the pressure against the pellet increases. There was a problem (7') in which the position of the beret would be shifted if this was added.

本発明の目的は、前記従来技術の問題点を解決し、安価
な半田材料を使用して確実なペレット付けを行ない、ワ
イヤボンディング時等にペレット付は位置のずれを生じ
ることのない半導体装置を提供することにある。An object of the present invention is to solve the problems of the prior art described above, to perform reliable pellet attachment using inexpensive solder materials, and to provide a semiconductor device in which the pellet attachment does not cause positional deviation during wire bonding. It is about providing.

この目的を達成するため、本発明は半田中に銅を混入し
、半田の融点を上げることを％像とするものである。In order to achieve this object, the present invention aims at increasing the melting point of the solder by mixing copper into the solder.

以下、本発明を図面に示す一実施例にしたがって詳細に
説明する。Hereinafter, the present invention will be explained in detail according to an embodiment shown in the drawings.

第１図は本発明により銅を少量混入させた半田材料でペ
レット付けを行なった半導体装置のペレット取付部の部
分断面図である。FIG. 1 is a partial cross-sectional view of a pellet mounting portion of a semiconductor device in which pellet attachment is performed using a solder material containing a small amount of copper according to the present invention.

本実施例において、リードフレーム１のタブ２の上には
、シリコンよりなる半導体ペレット４が半田３を用いて
ペレット付けされている。そして、半導体ペレット４の
ポンディングパッド（電極部）はアルミニウム（Ａりの
ワイヤ５により前記リードフレーム１のインナーリード
部６と電気的に接続されている。その後、ペレット取付
部はたとえばセラミック材料等よりなる）くツケージ０
）中に気密刺止される。In this embodiment, a semiconductor pellet 4 made of silicon is attached onto the tab 2 of the lead frame 1 using solder 3. The bonding pad (electrode portion) of the semiconductor pellet 4 is electrically connected to the inner lead portion 6 of the lead frame 1 by a wire 5 made of aluminum (A).Then, the pellet attachment portion is made of, for example, a ceramic material. more) Kutsu cage 0
) is hermetically sealed inside.

本実施例では、ペレット付けのために用（・もれている
半田３は鉛とすすに少量の銅を混入し、その融点をたと
えば３５０℃以上、６６０℃以下ｆ）範囲まで上げるよ
うにしたものである。In this example, the leaking solder 3 was made by mixing lead and soot with a small amount of copper to raise its melting point to a range of, for example, 350°C or higher and 660°C or lower. It is something.

すなわち、この場合の鋼の含有率は第２図ｆ）状塾図に
おい℃半田の融点が３５０℃以上、６６０″Ｃ以下にな
る範囲で選ばれている。この場合σン３５０℃の下限値
はリードフレーム１の加熱温度を基準とし、また６６０
℃の上限偽はワイヤボンディング用のワイヤとしてアル
ミニウムワイヤを用（・た場合の熱圧着時のアルミニウ
ムの融点を基準とした、ものである。That is, the steel content in this case is selected within the range where the melting point of the solder is 350°C or higher and 660"C or lower in Figure 2 f). In this case, the lower limit of σ is 350°C. is based on the heating temperature of lead frame 1, and 660
The false upper limit of °C is based on the melting point of aluminum during thermocompression bonding when aluminum wire is used as wire bonding wire.

したがって、この場合には、銅の含有率は約１〜４原子
％　（ＡｔｏｍｉＣ−）　テアル。Therefore, in this case, the copper content is about 1-4 atomic % (AtomiC-)teal.

また、アルミニウムワイヤを用いない場合等の条件を考
慮に入れると、銅の含有率＆１好ましく（家ｌ〜２原子
嘩である０ その結果、本実施例においては、ペレット付は後Ｋ　ハ
ラケージの気密刺止やワイヤボンディングのために３５
０℃以上の高温で加熱された場合でも、半田３が溶融し
て半導体ペレット４の位置がずれるようなことは防止さ
れる。In addition, taking into consideration the conditions such as when aluminum wire is not used, the copper content is preferably +1 (1 to 2 atoms).As a result, in this example, with pellets, the airtightness of the cage is 35 for stabbing and wire bonding
Even when heated at a high temperature of 0° C. or higher, the solder 3 is prevented from melting and the position of the semiconductor pellet 4 is prevented from shifting.

以上説明したように、本発明によれば、半田中に銅を所
定量混入することにより、半田の融点を上げ、ワイヤボ
ンディング時等のペレット付は位置のずれを防止し、安
価で確実なペレット付けを行なうことができろうAs explained above, according to the present invention, by mixing a predetermined amount of copper into the solder, the melting point of the solder is raised, and when attaching pellets during wire bonding, the position of the pellets is prevented from shifting, and the pellets are inexpensive and reliable. It would be possible to attach

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明により鋼を混入した半田でペレット付け
を行った半導体装置のペレット取付部の部分断面図、 第２図は銅の含有率と融点の関係郷な示す図である。 １・・・リードフレーム、２・・・タブ、３・・・半田
、４・・・半導体ペレット、５・・・ワイヤ、６・・・
インナーリード部７ 代理人　弁理士　　薄　１）利　幸 第１図 第　　２　　図 鉛（オｆ・＊〕FIG. 1 is a partial cross-sectional view of a pellet mounting portion of a semiconductor device in which pellets are attached using solder mixed with steel according to the present invention, and FIG. 2 is a diagram showing the relationship between copper content and melting point. DESCRIPTION OF SYMBOLS 1...Lead frame, 2...Tab, 3...Solder, 4...Semiconductor pellet, 5...Wire, 6...
Inner Lead Department 7 Agent Patent Attorney Susuki 1) Toshiyuki Figure 1 Figure 2 Lead (off・*)

Claims (1)

【特許請求の範囲】 １、半導体ベレットを半田によりベレット取付面上に取
り付けてなる半導体装置において、半田の中に銅を混入
させたことを特徴とする半導体装置。 ２、半田中の銅の含ｗｅが１〜４Ｊｒ（子チであること
を特徴とする特許請求の範囲第１項記載の半導体装置。 ３　半田中の銅の含有率が１〜２原子チであることを特
徴とする特許請求の範囲第２項記載の半導体装置。[Scope of Claims] 1. A semiconductor device comprising a semiconductor pellet attached to a pellet mounting surface by solder, characterized in that copper is mixed into the solder. 2. The semiconductor device according to claim 1, wherein the content of copper in the solder is 1 to 4 Jr. A semiconductor device according to claim 2, characterized in that:
JP57083091A 1982-05-19 1982-05-19 semiconductor equipment Pending JPS58200546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57083091A JPS58200546A (en) 1982-05-19 1982-05-19 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57083091A JPS58200546A (en) 1982-05-19 1982-05-19 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS58200546A true JPS58200546A (en) 1983-11-22

Family

ID=13792505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57083091A Pending JPS58200546A (en) 1982-05-19 1982-05-19 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS58200546A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4622205A (en) * 1985-04-12 1986-11-11 Ibm Corporation Electromigration lifetime increase of lead base alloys
JP2008235898A (en) * 2007-03-19 2008-10-02 Infineon Technologies Ag Power semiconductor module, power semiconductor module manufacturing method, and semiconductor chip

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036225B1 (en) * 1970-03-02 1975-11-21
JPS5424826B2 (en) * 1975-11-25 1979-08-23
JPS5653996Y2 (en) * 1977-08-17 1981-12-16

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036225B1 (en) * 1970-03-02 1975-11-21
JPS5424826B2 (en) * 1975-11-25 1979-08-23
JPS5653996Y2 (en) * 1977-08-17 1981-12-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4622205A (en) * 1985-04-12 1986-11-11 Ibm Corporation Electromigration lifetime increase of lead base alloys
JP2008235898A (en) * 2007-03-19 2008-10-02 Infineon Technologies Ag Power semiconductor module, power semiconductor module manufacturing method, and semiconductor chip

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