JPS58179914A - Information converter - Google Patents

Abstract

PURPOSE:To obtain an information converter which converts a digital data into a staircase wave having a modulated period for a data recorder/reproducer, by using a staircase wave generating circuit. CONSTITUTION:The staircase waves of different periods can be selected in accordance with 1 or 0 of the signal at a terminal Q which is obtained by latching a data signal (a) by a latching circuit 11. In other words, the half period T of the staircase wave is short and long when the data (a) is set at 0 and 1 respectively. This staircase wave is recorded on a magnetic tape 3 by a tape recorder 7. An output signal (c) is fed to a buffer 14 of a comparator 5 in the reproduction mode. At the same time, the top and bottom points of the signal (c) are held by a diode D5 and a capacitor C2 and the D6 and C3 respectively. Then the amplitude center potential of the signal emerges at a capacitor C4 through resistances R8 and R9. An operational amplifier 15 compares the signal with the amplitude center. Then it is possible to extract a square waveform (d) which has a short period to a signal 0 and a long period to a signal 1 respectively. Thus, the recording density is greatly increased.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information conversion device that converts digital data into information in a format suitable for recording on a magnetic tape or the like.

As is well known, the phase modulation method is mainly used to record digital data on magnetic tape.
The current recording density is 32 bits, 111 bits per inch, or 64 bits L/mn+.

The main object of this invention is to significantly increase such recording density.

Specifically, the present invention provides an information conversion device for converting input digital data a into a periodic modulated staircase wave as shown in FIG. That is.

The signal obtained by reading out the data signal modulated into such a staircase wave has a waveform close to a periodically varied sine wave as shown in FIG.
A staircase wave with very small amplitude fluctuations must be determined so that it is easy to find the amplitude center to obtain the square wave shown in Figure (c).

Therefore, the staircase wave shown in FIG. 3(a) ideally has a shape that approximates a sine wave, and it is also desirable to advance the point in time at which the period is changed, taking into account the phase delay. Even if a staircase wave is recorded, it becomes smooth like the sine wave in (b) because the recording device, such as a two-tape recorder, is operated at a frequency close to its cutoff frequency.

Next, as shown in FIG. 1, to specifically describe an example of the apparatus of the present invention, 1 is a staircase wave generation circuit for obtaining the staircase wave as described above, 2 is an amplifier, 3 is a magnetic tape, and 4 is the same. An amplifier, 5 a comparison circuit for comparing the read signals at their amplitude centers, 6 a period reading and decoding circuit, and 7 a cheap recorder. Further, a is a data signal to be recorded, b is a staircase wave shown in FIG. 3(a), C is a reproduced wave shown in FIG. 3(b), and d is a square wave similarly shown in FIG. 3(c). e indicates read data.

The staircase wave generation circuit 1 has an input terminal f-C of the clock pulse cp.
ρ and reset terminal R and output terminal TI, T2...
...Shift register 8 with T6 (shift direction is from T1 to T6) and switching input terminals 01, 02, 0
3 and data input terminal UO.

Ul, U2...A data selector 9 equipped with Ul and an output terminal OUT, an input terminal IN from the output terminal -OUT of this data selector 9, and an output terminal Vl,
V2. A counter 10 having a voltage V3, a data latch circuit 11 that latches the value of a terminal W at the rising edge of a signal applied to a terminal X, and an AND circuit with a negative input connected to the output terminals Vl and V2 of the counter 10 An exclusive OR circuit EORI connected to the output terminal V2゜■3 of the counter 10, an exclusive OR circuit FOR2 connected to the output terminals Vl and V3 of the counter 10, and each exclusive OR circuit EORI.

Each output of FOR2 is connected to a diode DI, D2...
It is comprised of a clamp circuit 12 that clamps by the forward potential difference of D4, and a dinotal analog converter 13 configured by selecting resistors R4 and R5 at a ratio of 1:2.

When the input terminal 01 of the data selector 9 is 0, one of the data input terminals UO to U3 and the output terminal OUT are connected according to the values of the terminals Vl and V2 of the counter 10, and when the input terminal 01 is 1, the output terminal OUT is connected to the data selector 9. Similarly, counter 1
According to the value of the terminal Vl of 0, ~'2, one of the data input terminals U4 to U7 and the output terminal OUT are connected.

The comparator 5 which compares at the center of amplitude is composed of the buffer 7-amplifier 14 and the diode D5. D6. D? , D8, resistance R7, R8
+R9, consists of +C2, C3, C4 and an operational amplifier 15, inputs signal C and outputs signal d.

The operation of such a staircase wave generating circuit will be described with reference to the waveform diagram in FIG. 2.

First, the output terminal V1. of the counter 10. V2. Assume that the signal of V3 is (1, 0, 0). Tepa Ittaratchi 11
When the signal at the output terminal Q is 0, the signal from the data input terminal 7-U1 is output to the output terminal OUT of the data selector 9. Also, since this data input terminal U1 is connected to the output terminal T3 of the shift register 8, when the clock pulse CP is applied to the terminal Cρ three times, a signal is output from the output terminal OUT of the data selector 9, and the resistor R
1 and a capacitor C1 to the reset terminal R of the shift register 8. At this time, the shift register 8 is reset and all outputs disappear.

In this way, a signal narrower in width than the clock pulse CP can be taken out from the data selector 9Q output terminal OUT. When the signal at the output terminal OUT of the data selector 9 disappears, the output terminals Vl, V2 . The signal of V3 is (0,
1, o).

In this case, the output terminal OUT of the data selector 9 will be connected to the data input terminal U2, and the output terminal of the data selector 9 will be connected to the data input terminal U2 at intervals of time determined by the connection between the shift register 8 and the data selector 9. Terminal OUT
A signal is taken which advances the counter 10.

Output terminal V1 of counter 10 in staircase wave generation circuit 1
．． V2 represents four steps of a staircase wave, and therefore, each time a signal is input from the input terminal IN, the level of the output signal S of this circuit 1 changes in a stepwise manner. Here V
l, V2. Each signal of V3 is Vl=l, V2=1 . V3=
x (x=0 or 1) and V1=0. V2=0. V
In the case of 3=x, the value of the output signal S is the same, and only in this case it stays at the same stage. That is, when a signal is input eight times from the input terminal IN of the counter 10,
A staircase wave for one period is obtained from the output terminal of the dinotal analog converter 13, that is, the output terminal of the signal.

As shown in FIG. 3(a), the staircase wave has a waveform in which the amplitude sequentially increases from the reference value toward the maximum value and decreases from the maximum value toward the reference value.

The shift register 8 plays the role of a timer and serves as a time reference for each stage of the staircase wave, and the data selector 9 uses the data input terminals UO, Ul...U7 and the output terminal TI of the shift register 8 according to each stage. , T2...T6
It connects between.

Therefore, depending on the signal applied to the CI terminal, the data input terminals U0, 01...U3 or U4...U
Since the combinations of 7 can be switched, a staircase waveform with a different period can be selected depending on whether the signal at the terminal Q, where the data a is latched by the latch circuit 11, is 1 or O. That is,
In this embodiment, when the data a is (), the half period T of the staircase wave is short, and when the data a is a bow, T is long. This staircase wave is recorded on the magnetic tape 3 by the tape recorder 7 via the amplifier 2.

Next, when reproducing the magnetic tape 3, the signal C read out via the amplifier 4 is input to the buffer 7-amplifier 14 in the comparator 8 and is amplified, and the signal C is amplified by the diode D5 and capacitor C2. The peak is held, and the peak of the signal valley is held by diode D6 and capacitor C8.

Then, the potential at the center of the amplitude of the signal is applied to the capacitor C4 through the resistors R8 and R9, and the signal is compared with the center of its amplitude in the operational amplifier 15. is short, and for signal 1, a square wave d with a long period is extracted.

Furthermore, diode D7. D8 is inserted to prevent the output of the operational amplifier 15 from becoming saturated.

<Example> 1/6 MH from the clock pulse generator Cρ shown in Fig. 1
Input the z signal to the tape recorder 7 to set the tape speed to 48.
When cm/second is used, by recording one bit of data in a half period of the staircase wave, the half period is 66 μs for data “0” and 90 μs for data “1”. It's now seconds. Therefore, recording density can be obtained even if it is coarse.

As described above, according to the apparatus of the present invention, it is possible to obtain an information signal with a recording density three times higher than that of the conventional apparatus.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an example of the present invention, Fig. 2 is a signal waveform diagram of the main part thereof, and Fig. 3 (,) (b) (c
) is defined by the output signal waveform of the main part in Figure 1. 1... Staircase wave generation circuit, 2, 4... Amplifier, 3...
・Magnetic tape, 5... Comparator that compares at the center of amplitude, 6
... Periodic reading and decoding circuit, 7... Tape recorder. Patent applicant: Kinki Keikokuki Co., Ltd. Agent: Patent attorney: Aoyo: 2 people

Claims (1)

[Claims] (1) Sequentially read at least binary level digital data, and have different cycles corresponding to each signal level according to the level of the read data, and within each cycle, the amplitude changes from the reference value to the maximum value. 1. An information converting device comprising a converting means for converting into a step wave having at least 1/2 period, increasing stepwise from the maximum value to the reference value and decreasing from the maximum value to the reference value.