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JPS58130272U - Printed board - Google Patents

Printed board

Info

Publication number
JPS58130272U
JPS58130272U JP2685382U JP2685382U JPS58130272U JP S58130272 U JPS58130272 U JP S58130272U JP 2685382 U JP2685382 U JP 2685382U JP 2685382 U JP2685382 U JP 2685382U JP S58130272 U JPS58130272 U JP S58130272U
Authority
JP
Japan
Prior art keywords
circuit board
printed board
printed circuit
periphery
predetermined number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2685382U
Other languages
Japanese (ja)
Inventor
福山 昌弘
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP2685382U priority Critical patent/JPS58130272U/en
Publication of JPS58130272U publication Critical patent/JPS58130272U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は、本考案に係るプリント基板の第1
の実施例を示す図面、第3図は第2の実施例を示す図面
1.第4図は第3図I−I線に沿う部分拡大断面図、−
第5図は第2の実施例に係るプリント基板に半導体装置
を半田付けした状態を示す部分拡大断面図、第6図は第
2の実施例に係るプリント基板を切断した時の状態を示
す拡大断面図である。 A・・・・・・プリント基板、B・・・・・・半導体装
置、C・・・・・・リード線、1・・・・・・接点、2
・・・・・・凸部、3・・・・・・リード部。 −−第3図      7 −ノ σσJJ 第6図 /′ヂ   /
1 and 2 show the first part of the printed circuit board according to the present invention.
FIG. 3 is a drawing showing the second embodiment. FIG. 4 is a partially enlarged sectional view taken along line I-I in FIG.
FIG. 5 is a partially enlarged sectional view showing a state in which a semiconductor device is soldered to a printed circuit board according to the second embodiment, and FIG. 6 is an enlarged view showing a state when the printed circuit board according to the second embodiment is cut. FIG. A...Printed circuit board, B...semiconductor device, C...lead wire, 1...contact, 2
...Convex part, 3...Lead part. --Figure 3 7 -ノσσJJ Figure 6/'ji/

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント基板の表面に、所定個数の半導体装置の各リー
ド線とそれぞれ接続する接点を形成し、周縁の一部に、
゛上記各接点とそれぞれ対応し、且つ電気的に接続され
たリード部を設けたことを特徴とするプリント基板。
Contact points are formed on the surface of the printed circuit board to connect with each lead wire of a predetermined number of semiconductor devices, and a part of the periphery is
゛A printed circuit board characterized by being provided with lead portions corresponding to and electrically connected to each of the above-mentioned contacts.
JP2685382U 1982-02-25 1982-02-25 Printed board Pending JPS58130272U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2685382U JPS58130272U (en) 1982-02-25 1982-02-25 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2685382U JPS58130272U (en) 1982-02-25 1982-02-25 Printed board

Publications (1)

Publication Number Publication Date
JPS58130272U true JPS58130272U (en) 1983-09-02

Family

ID=30038784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2685382U Pending JPS58130272U (en) 1982-02-25 1982-02-25 Printed board

Country Status (1)

Country Link
JP (1) JPS58130272U (en)

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