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JPS5779641A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5779641A
JPS5779641A JP15614480A JP15614480A JPS5779641A JP S5779641 A JPS5779641 A JP S5779641A JP 15614480 A JP15614480 A JP 15614480A JP 15614480 A JP15614480 A JP 15614480A JP S5779641 A JPS5779641 A JP S5779641A
Authority
JP
Japan
Prior art keywords
mask
polycrystalline
layer
intervals
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15614480A
Other languages
Japanese (ja)
Other versions
JPS628029B2 (en
Inventor
Hisahiro Matsukawa
Hiroshi Nozawa
Junichi Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15614480A priority Critical patent/JPS5779641A/en
Publication of JPS5779641A publication Critical patent/JPS5779641A/en
Publication of JPS628029B2 publication Critical patent/JPS628029B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To enable to obtain a semiconductor substrate having few generation of defect improving the element isolation technique by a method wherein after a material layer having high oxidation speed and being provided on the semiconductor substrate is oxidized selectively using a mask having the intervals of less than the prescribed pitch, while a part of the remaining material layer is removed. CONSTITUTION:After the polycrystalline Si layer 3 is provided on the Si substrate 1 interposing an insulating film 2 between them, the Si3N4 mask having the intervals of pitch of 2mum or less between mask is provided, and selective etching is performed to form thick field oxide films 6, and after the Si3N4 film is removed, a part of the remaining polycrystalline Si layer is removed, and still remained polycrystalline Si layers 3'' are oxidized. Accordingly generation of defect is reduced, the element isolation films can be formed, and formation of the device in minute type can be attained.
JP15614480A 1980-11-06 1980-11-06 Manufacture of semiconductor device Granted JPS5779641A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15614480A JPS5779641A (en) 1980-11-06 1980-11-06 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15614480A JPS5779641A (en) 1980-11-06 1980-11-06 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5779641A true JPS5779641A (en) 1982-05-18
JPS628029B2 JPS628029B2 (en) 1987-02-20

Family

ID=15621283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15614480A Granted JPS5779641A (en) 1980-11-06 1980-11-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5779641A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4818235A (en) * 1987-02-10 1989-04-04 Industry Technology Research Institute Isolation structures for integrated circuits
JPH09123504A (en) * 1995-08-30 1997-05-13 Alps Electric Co Ltd Thermal head and manufacture thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4818235A (en) * 1987-02-10 1989-04-04 Industry Technology Research Institute Isolation structures for integrated circuits
JPH09123504A (en) * 1995-08-30 1997-05-13 Alps Electric Co Ltd Thermal head and manufacture thereof

Also Published As

Publication number Publication date
JPS628029B2 (en) 1987-02-20

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