JPS5764389A - Data output reversing circuit of semiconductor memory device - Google Patents
Data output reversing circuit of semiconductor memory deviceInfo
- Publication number
- JPS5764389A JPS5764389A JP13947480A JP13947480A JPS5764389A JP S5764389 A JPS5764389 A JP S5764389A JP 13947480 A JP13947480 A JP 13947480A JP 13947480 A JP13947480 A JP 13947480A JP S5764389 A JPS5764389 A JP S5764389A
- Authority
- JP
- Japan
- Prior art keywords
- data
- output
- reversing circuit
- data output
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000872 buffer Substances 0.000 abstract 2
- 230000002441 reversible effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
Landscapes
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To constitute a circuit so that contents stored in a memory can be optionally decided and read out by a use as to whether they are a data as it is or a reversed data, by making ''1'', ''0'', etc. of a data output reversible by an input of one signal or more. CONSTITUTION:An address inputted to address input lines A0-An is decoded by an address decoder 1, a prescribed data is read out through a sense amplifier 3 from a memory cell part 2, and a data is outputted to data output lines D0-Dn from output buffers 50-Rn. In case when an input I of a data output reversing circuit 6 is ''L'', said operation is executed. Also, in case when the input I is ''H'', an output of the output buffers, 50-5n is made a floating state by the data output reversing circuit 6, an output of the data output reversing circuit 6 is outputted to the output lines D0-Dn, and an output data which has reversed a data written in the memory cell part 2 is obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13947480A JPS5764389A (en) | 1980-10-03 | 1980-10-03 | Data output reversing circuit of semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13947480A JPS5764389A (en) | 1980-10-03 | 1980-10-03 | Data output reversing circuit of semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5764389A true JPS5764389A (en) | 1982-04-19 |
Family
ID=15246080
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13947480A Pending JPS5764389A (en) | 1980-10-03 | 1980-10-03 | Data output reversing circuit of semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5764389A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03171497A (en) * | 1989-11-29 | 1991-07-24 | Matsushita Electric Ind Co Ltd | Data processor |
-
1980
- 1980-10-03 JP JP13947480A patent/JPS5764389A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03171497A (en) * | 1989-11-29 | 1991-07-24 | Matsushita Electric Ind Co Ltd | Data processor |
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