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JPS5738039A - Duplex system transmission controlling circuit - Google Patents

Duplex system transmission controlling circuit

Info

Publication number
JPS5738039A
JPS5738039A JP11349280A JP11349280A JPS5738039A JP S5738039 A JPS5738039 A JP S5738039A JP 11349280 A JP11349280 A JP 11349280A JP 11349280 A JP11349280 A JP 11349280A JP S5738039 A JPS5738039 A JP S5738039A
Authority
JP
Japan
Prior art keywords
dma
circuit
transmission controlling
transmission
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11349280A
Other languages
Japanese (ja)
Other versions
JPS6242547B2 (en
Inventor
Hideo Otani
Yoshiyuki Futahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11349280A priority Critical patent/JPS5738039A/en
Publication of JPS5738039A publication Critical patent/JPS5738039A/en
Publication of JPS6242547B2 publication Critical patent/JPS6242547B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To convert a simplex system into a duplex system simply by printed cards added, by preparing two printed cards having the same transmission controlling circuit. CONSTITUTION:When a transmission circuit 16 is connected to a system A, an advance data link ADL controller 4A receives a flag and sets a flip-flop 14A, a direct memory access DMA request signal 8 is outputted from the circuits of system A only, and a DMA permission signal 9 is also inputted to the circuit of system A only for the execution of DMA. A microprocessor MPU1 starts the both transmission controlling circuits of the systems A and B with the same addressing. Since the circuit of the system A enables the gate of a DMA request signal 8A with the flip- flop 14A, only the memory data is transmitted on the bus, and the DMA permission signal 9 is inputted to transmit the memory data to a transmission line 16 through DMA transfer.
JP11349280A 1980-08-20 1980-08-20 Duplex system transmission controlling circuit Granted JPS5738039A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11349280A JPS5738039A (en) 1980-08-20 1980-08-20 Duplex system transmission controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11349280A JPS5738039A (en) 1980-08-20 1980-08-20 Duplex system transmission controlling circuit

Publications (2)

Publication Number Publication Date
JPS5738039A true JPS5738039A (en) 1982-03-02
JPS6242547B2 JPS6242547B2 (en) 1987-09-09

Family

ID=14613668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11349280A Granted JPS5738039A (en) 1980-08-20 1980-08-20 Duplex system transmission controlling circuit

Country Status (1)

Country Link
JP (1) JPS5738039A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115702A (en) * 1973-03-08 1974-11-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115702A (en) * 1973-03-08 1974-11-05

Also Published As

Publication number Publication date
JPS6242547B2 (en) 1987-09-09

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