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JPS57211747A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57211747A
JPS57211747A JP9665581A JP9665581A JPS57211747A JP S57211747 A JPS57211747 A JP S57211747A JP 9665581 A JP9665581 A JP 9665581A JP 9665581 A JP9665581 A JP 9665581A JP S57211747 A JPS57211747 A JP S57211747A
Authority
JP
Japan
Prior art keywords
film
groove
poly crystal
poly
si3n4
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9665581A
Other languages
Japanese (ja)
Inventor
Akihisa Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9665581A priority Critical patent/JPS57211747A/en
Publication of JPS57211747A publication Critical patent/JPS57211747A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To improve the flatness of a surface when the embedding of a groove is finished, by leaving the seed of poly Si which is formed in the isolating U groove with excellent controllability. CONSTITUTION:The U groove is formed on an Si substrate 1. On its surface, an SiO2 film 6', a poly crystal Si film, and an Si3N4 film 7 are sequentially grown. Then, each layer is left to the extent the upper part of the U groove is covered, and only the poly crystal Si film, which is held by the SiO2 film 6' and the Si3N4 film 7, is etched from the periphery. At this time, by controlling the etching time, a shape 8'b is formed so that the inner side of the poly crystal Si film formed at the bottom of the groove is flat, and the peripheral part is protruded. Then, the Si3N4 film 7 is removed. With the remaining poly crystal Si film 8'b as the seed, a poly crystal Si 14 is grown from the bottom of the U groove to the surface level of the substrate. Thus the isolation structure whose surface is flat is obtained.
JP9665581A 1981-06-24 1981-06-24 Manufacture of semiconductor device Pending JPS57211747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9665581A JPS57211747A (en) 1981-06-24 1981-06-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9665581A JPS57211747A (en) 1981-06-24 1981-06-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57211747A true JPS57211747A (en) 1982-12-25

Family

ID=14170842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9665581A Pending JPS57211747A (en) 1981-06-24 1981-06-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57211747A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546538A (en) * 1983-09-05 1985-10-15 Oki Electric Industry Co., Ltd. Method of manufacturing semiconductor integrated circuit devices having dielectric isolation regions
US5342792A (en) * 1986-03-07 1994-08-30 Canon Kabushiki Kaisha Method of manufacturing semiconductor memory element
US5387538A (en) * 1992-09-08 1995-02-07 Texas Instruments, Incorporated Method of fabrication of integrated circuit isolation structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546538A (en) * 1983-09-05 1985-10-15 Oki Electric Industry Co., Ltd. Method of manufacturing semiconductor integrated circuit devices having dielectric isolation regions
US5342792A (en) * 1986-03-07 1994-08-30 Canon Kabushiki Kaisha Method of manufacturing semiconductor memory element
US5387538A (en) * 1992-09-08 1995-02-07 Texas Instruments, Incorporated Method of fabrication of integrated circuit isolation structure

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