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JPS57190416A - Analog-to-digital converter - Google Patents

Analog-to-digital converter

Info

Publication number
JPS57190416A
JPS57190416A JP7501381A JP7501381A JPS57190416A JP S57190416 A JPS57190416 A JP S57190416A JP 7501381 A JP7501381 A JP 7501381A JP 7501381 A JP7501381 A JP 7501381A JP S57190416 A JPS57190416 A JP S57190416A
Authority
JP
Japan
Prior art keywords
converted
gain
amplified
analog
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7501381A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Futahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7501381A priority Critical patent/JPS57190416A/en
Publication of JPS57190416A publication Critical patent/JPS57190416A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To convert wide-ranging analog inputs into digital inputs quickly by providing a binary gain amplifier, an A-D converter and a priority encoder. CONSTITUTION:An analog input signal A1 is amplified by the minimum gain of a variable binary gain amplifier 4 and the amplified value is A-D converted by an A-D converter 5. For the A-D converted result, the optimum gain is determined by a priority encoder 7. After determining the optimum gain, the analog input is amplified again by the optimum gain and the amplified value is A-D-converted again to obtain the converted digital data.
JP7501381A 1981-05-20 1981-05-20 Analog-to-digital converter Pending JPS57190416A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7501381A JPS57190416A (en) 1981-05-20 1981-05-20 Analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7501381A JPS57190416A (en) 1981-05-20 1981-05-20 Analog-to-digital converter

Publications (1)

Publication Number Publication Date
JPS57190416A true JPS57190416A (en) 1982-11-24

Family

ID=13563869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7501381A Pending JPS57190416A (en) 1981-05-20 1981-05-20 Analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS57190416A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61245630A (en) * 1985-04-24 1986-10-31 Fujitsu Ltd Analog/digital conversion method
JPH02190027A (en) * 1989-01-19 1990-07-26 Sanyo Electric Co Ltd Automatic gain controlling a/d converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61245630A (en) * 1985-04-24 1986-10-31 Fujitsu Ltd Analog/digital conversion method
JPH02190027A (en) * 1989-01-19 1990-07-26 Sanyo Electric Co Ltd Automatic gain controlling a/d converter

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